IS62/65WV102416EALL
IS62/65WV102416EBLL
JANUARY 2015
1Mx16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
KEY FEATURES
DESCRIPTION
The IS62WV102416EALL/BLL and
High-speed access time: 45ns, 55ns
CMOS low power operation
– 30 mW (typical) operating
– 12 µW (typical) CMOS standby
TTL compatible interface levels
IS65WV102416EALL/BLL are Low Power, 16M bit
static RAMs organized as 1024K words by 16bits. It is
fabricated using
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
Single power supply
–1.65V—1.98V Vdd (62/65WV102416EALL)
– 2.2V--3.6V Vdd (62/65WV102416EBLL)
Data control for upper and lower bytes
Industrial and Automotive temperature support
When
(deselected) or when
and are HIGH, the device assumes a standby
is HIGH (deselected) or when CS2 is low
is low , CS2 is high and both
mode at which the power dissipation can be reduced
down with CMOS input levels.
Easy memory expansion is provided by using Chip
Enable and Output Enable inputs. The active LOW
Write Enable
the memory. A data byte allows Upper Byte
Lower Byte ( access.
The IS62WV102416EALL/BLL and
controls both writing and reading of
and
IS65WV102416EALL/BLL are packaged in the JEDEC
standard 48-pin BGA (6mm x 8mm).
BLOCK DIAGRAM
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without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc.- www.issi.com
1
Rev. A
12/12/2014