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IS62WV102416FBLL-55TLI PDF预览

IS62WV102416FBLL-55TLI

更新时间: 2024-09-17 05:22:27
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
17页 671K
描述
Standard SRAM, 1MX16, 55ns, CMOS, PDSO48, TSOP1-48

IS62WV102416FBLL-55TLI 技术参数

生命周期:Active包装说明:TSOP1,
Reach Compliance Code:unknownHTS代码:8542.32.00.41
风险等级:5.73最长访问时间:55 ns
JESD-30 代码:R-PDSO-G48长度:18.4 mm
内存密度:16777216 bit内存集成电路类型:STANDARD SRAM
内存宽度:16功能数量:1
端子数量:48字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:1MX16封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.2 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
宽度:12 mmBase Number Matches:1

IS62WV102416FBLL-55TLI 数据手册

 浏览型号IS62WV102416FBLL-55TLI的Datasheet PDF文件第2页浏览型号IS62WV102416FBLL-55TLI的Datasheet PDF文件第3页浏览型号IS62WV102416FBLL-55TLI的Datasheet PDF文件第4页浏览型号IS62WV102416FBLL-55TLI的Datasheet PDF文件第5页浏览型号IS62WV102416FBLL-55TLI的Datasheet PDF文件第6页浏览型号IS62WV102416FBLL-55TLI的Datasheet PDF文件第7页 
IS62WV102416FALL/BLL  
IS65WV102416FALL/BLL  
JANUARY 2017  
1Mx16 LOW VOLTAGE,  
ULTRA LOW POWER CMOS STATIC RAM  
KEY FEATURES  
DESCRIPTION  
High-speed access time: 45ns, 55ns  
CMOS low power operation  
The ISSI IS62/65WV102416FALL/FBLL are high-speed,  
low power, 16M bit static RAMs organized as 1024K words  
by 16 bits. It is fabricated using ISSI's high-performance  
CMOS technology.  
Operating Current: 36mA (max.)  
CMOS standby Current: 5.8uA (typ.)  
TTL compatible interface levels  
Single power supply  
This highly reliable process coupled with innovative circuit  
design techniques, yields high-performance and low power  
consumption devices. When CS1# is HIGH (deselected) or  
when CS2 is LOW (deselected) or when CS1# is LOW,  
CS2 is HIGH and both LB# and UB# are HIGH, the device  
assumes a standby mode at which the power dissipation  
can be reduced down with CMOS input levels.  
1.65V-2.2V VDD (IS62/65WV102416FALL)  
2.2V-3.6V VDD (IS62/65WV102416FBLL)  
Three state outputs  
Easy memory expansion is provided by using Chip Enable  
and Output Enable inputs. The active LOW Write Enable  
(WE#) controls both writing and reading of the memory. A  
data byte allows Upper Byte (UB#) and Lower Byte (LB#)  
access.  
Commercial, Industrial and Automotive  
temperature support  
Lead-free available  
The IS62/65WV102416FALL/FBLL are packaged in the  
JEDEC standard 48-pin mini BGA (6mm x 8mm) and 48-Pin  
TSOP (TYPE I).  
FUNCTIONAL BLOCK DIAGRAM  
1M x 16  
MEMORY  
ARRAY  
DECODER  
A0 A19(20)  
VDD  
GND  
I/O0 I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
I/O8 I/O15  
CIRCUIT  
Upper Byte  
BYTE#  
CS2  
CS1#  
OE#  
CONTROL  
CIRCUIT  
WE#  
UB#  
LB#  
Copyright © 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can  
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such  
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc.- www.issi.com  
1
Rev. A  
01/05/2017  

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