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IS62WV10248BLL-70BI PDF预览

IS62WV10248BLL-70BI

更新时间: 2024-11-09 03:15:55
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
12页 79K
描述
1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

IS62WV10248BLL-70BI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:BGA
包装说明:TFBGA, BGA48,6X8,30针数:48
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.53
最长访问时间:70 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48JESD-609代码:e0
长度:8.7 mm内存密度:8388608 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:48字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:1MX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.00002 A最小待机电流:1.2 V
子类别:SRAMs最大压摆率:0.025 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.2 mm
Base Number Matches:1

IS62WV10248BLL-70BI 数据手册

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®
IS62WV10248BLL  
ISSI  
MARCH2006  
1M x 8 LOW VOLTAGE,  
ULTRA LOW POWER CMOS STATIC RAM  
FEATURES  
DESCRIPTION  
The ISSI IS62WV10248BLL is a high-speed, 8M bit static  
RAMsorganizedas1Mwordsby8bits. Itisfabricatedusing  
ISSI's high-performance CMOS technology. This highly  
reliable process coupled with innovative circuit design  
techniques, yields high-performance and low power  
consumption devices.  
• High-speed access time: 55ns, 70ns  
• CMOS low power operation:  
36 mW (typical) operating  
12 µW (typical) CMOS standby  
• TTL compatible interface levels  
• Single power supply:  
When CS1 is HIGH (deselected) or when CS2 is LOW  
(deselected), the device assumes a standby mode at which  
thepowerdissipationcanbereduceddownwithCMOSinput  
levels.  
2.5V--3.6V VDD (IS62WV10248BLL)  
Easy memory expansion is provided by using Chip Enable  
and Output Enable inputs. The active LOW Write Enable  
(WE) controls both writing and reading of the memory.  
• Fully static operation: no clock or refresh  
required  
• Three state outputs  
The IS62WV10248BLL is packaged in the JEDEC standard  
48-pin mini BGA (7.2mm x 8.7mm).  
• Industrial temperature available  
• Lead-free available  
FUNCTIONAL BLOCK DIAGRAM  
1M x 8  
MEMORY ARRAY  
A0-A19  
DECODER  
VDD  
GND  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O0-I/O7  
CS2  
CS1  
OE  
CONTROL  
CIRCUIT  
WE  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
1
Rev. C  
03/17/06  

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