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IS62WV10248ALL-70T PDF预览

IS62WV10248ALL-70T

更新时间: 2024-11-24 14:42:55
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
12页 55K
描述
Standard SRAM, 1MX8, 70ns, CMOS, PDSO44, TSOP2-44

IS62WV10248ALL-70T 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:TSOP2
包装说明:TSOP2-44针数:44
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.75
Is Samacsys:N最长访问时间:70 ns
JESD-30 代码:R-PDSO-G44JESD-609代码:e0
长度:18.41 mm内存密度:8388608 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:44字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:1MX8封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):240认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):2.2 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:10.16 mmBase Number Matches:1

IS62WV10248ALL-70T 数据手册

 浏览型号IS62WV10248ALL-70T的Datasheet PDF文件第2页浏览型号IS62WV10248ALL-70T的Datasheet PDF文件第3页浏览型号IS62WV10248ALL-70T的Datasheet PDF文件第4页浏览型号IS62WV10248ALL-70T的Datasheet PDF文件第5页浏览型号IS62WV10248ALL-70T的Datasheet PDF文件第6页浏览型号IS62WV10248ALL-70T的Datasheet PDF文件第7页 
®
IS62WV10248ALL  
IS62WV10248BLL  
ISSI  
PRELIMINARYINFORMATION  
SEPTEMBER2002  
1M x 8 LOW VOLTAGE,  
ULTRA LOW POWER CMOS STATIC RAM  
FEATURES  
DESCRIPTION  
TheISSIIS62WV10248ALL/IS62WV10248BLLare high-  
speed,8MbitstaticRAMsorganizedas1Mwordsby8bits.  
It is fabricated using ISSI's high-performance CMOS  
technology. This highly reliable process coupled with  
innovative circuit design techniques, yields high-  
performance and low power consumption devices.  
• High-speed access time: 55ns, 70ns  
• CMOS low power operation:  
36 mW (typical) operating  
12 µW (typical) CMOS standby  
• TTL compatible interface levels  
• Single power supply:  
When CS1 is HIGH (deselected) or when CS2 is LOW  
(deselected)orwhenCS1isLOW,CS2isHIGH,thedevice  
assumes a standby mode at which the power dissipation  
can be reduced down with CMOS input levels.  
1.65V--2.2V VDD (62WV10248ALL)  
2.5V--3.6V VDD (62WV10248BLL)  
Easy memory expansion is provided by using Chip Enable  
and Output Enable inputs. The active LOW Write Enable  
(WE) controls both writing and reading of the memory.  
• Fully static operation: no clock or refresh  
required  
TheIS62WV10248ALLandIS62WV10248BLLarepackged  
in the JEDEC standard 48-pin mini BGA (7.2mm x 8.7mm)  
and 44-Pin TSOP (TYPE II).  
• Three state outputs  
• Industrial temperature available  
FUNCTIONAL BLOCK DIAGRAM  
1M x 8  
MEMORY ARRAY  
A0-A19  
DECODER  
VDD  
GND  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O0-I/O7  
CS2  
CS1  
OE  
CONTROL  
CIRCUIT  
WE  
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. 00A  
1
09/20/02  

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IS62WV10248BLL-70B ISSI

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IS62WV10248BLL-70BI ISSI

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1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM
IS62WV10248BLL-70TI ISSI

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IS62WV10248BLL-70XI ISSI

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IS62WV10248DBLL-45MLI ISSI

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Standard SRAM, 1MX8, 45ns, CMOS, PBGA48, 9 X 11 MM, LEAD FREE, MINI, BGA-48
IS62WV10248DBLL-45TI ISSI

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1MX8 STANDARD SRAM, 45ns, PDSO44, TSOP2-44