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IS62LV25616LL-70BI PDF预览

IS62LV25616LL-70BI

更新时间: 2024-02-04 23:41:05
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
10页 88K
描述
Standard SRAM, 256KX16, 70ns, CMOS, PBGA48, 8 X 10 MM, MINI, BGA-48

IS62LV25616LL-70BI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:8 X 10 MM, MINI, BGA-48针数:48
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.84
最长访问时间:70 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48JESD-609代码:e0
长度:10 mm内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:48字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:256KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3 V
认证状态:Not Qualified座面最大高度:1.35 mm
最小待机电流:1.5 V子类别:SRAMs
最大压摆率:0.05 mA最大供电电压 (Vsup):3.15 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8 mmBase Number Matches:1

IS62LV25616LL-70BI 数据手册

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®
IS62LV25616LL  
256K x 16 LOW VOLTAGE, ULTRA  
LOW POWER CMOS STATIC RAM  
ISSI  
MAY 2001  
FEATURES  
DESCRIPTION  
The ISSI IS62LV25616LL is high-speed, 4,194,304 bit  
static RAM organized as 262,144 words by 16 bits. It is  
fabricated using ISSI's high-performance CMOS  
technology. This highly reliable process coupled with  
innovativecircuitdesigntechniques,yieldshigh-performance  
and low power consumption devices.  
• High-speed access time: 70 and 85 ns  
• CMOS low power operation  
– 135 mW (typical) operating  
– 16.5 µW (typical) CMOS standby  
• TTL compatible interface levels  
WhenCEisHIGH(deselected)orwhenCEislowandbothLBand  
UBareHIGH,thedeviceassumesastandbymodeatwhichthe  
powerdissipationcanbereduceddownwithCMOSinputlevels.  
Single 2.7V (min) to 3.15V (max) VCC power supply  
• Fully static operation: no clock or refresh  
required  
EasymemoryexpansionisprovidedbyusingChipEnableand  
OutputEnableinputs,CEandOE.TheactiveLOWWriteEnable  
(WE)controlsbothwritingandreadingofthememory.Adatabyte  
allowsUpperByte(UB)andLowerByte(LB)access.  
• Three state outputs  
• Data control for upper and lower bytes  
• Industrial temperature available  
The IS62LV25616LL is packaged in the JEDEC standard  
44-pin TSOP (Type II) and 48-pin mini BGA (8mm x 10mm  
and 7.2mm x 8.7mm).  
• Available in the 44-pin TSOP (Type II) and  
48-pin mini BGA (8mm x 10mm and 7.2mm x 8.7mm)  
FUNCTIONAL BLOCK DIAGRAM  
256K x 16  
MEMORY ARRAY  
A0-A17  
DECODER  
VCC  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any  
errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
1
Rev. A  
05/04/01  

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