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IS61LV25616AL-12T PDF预览

IS61LV25616AL-12T

更新时间: 2024-01-15 15:24:54
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
12页 68K
描述
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

IS61LV25616AL-12T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.92
最长访问时间:12 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G44内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
端子数量:44字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP
封装等效代码:TSOP44,.46,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
电源:3.3 V认证状态:Not Qualified
最大待机电流:0.01 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.09 mA
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUALBase Number Matches:1

IS61LV25616AL-12T 数据手册

 浏览型号IS61LV25616AL-12T的Datasheet PDF文件第2页浏览型号IS61LV25616AL-12T的Datasheet PDF文件第3页浏览型号IS61LV25616AL-12T的Datasheet PDF文件第4页浏览型号IS61LV25616AL-12T的Datasheet PDF文件第5页浏览型号IS61LV25616AL-12T的Datasheet PDF文件第6页浏览型号IS61LV25616AL-12T的Datasheet PDF文件第7页 
®
IS61LV25616AL  
256K x 16 HIGH SPEED ASYNCHRONOUS  
CMOS STATIC RAM WITH 3.3V SUPPLY  
ISSI  
FEBRUARY2003  
DESCRIPTION  
FEATURES  
The ISSI IS61LV25616AL is a high-speed, 4,194,304-bit  
static RAM organized as 262,144 words by 16 bits. It is  
fabricated using ISSI's high-performance CMOS technol-  
ogy. This highly reliable process coupled with innovative  
circuitdesigntechniques,yieldshigh-performanceandlow  
powerconsumptiondevices.  
• High-speed access time:  
— 10, 12 ns  
• CMOS low power operation  
• Low stand-by power:  
— Less than 5 mA (typ.) CMOS stand-by  
• TTL compatible interface levels  
• Single 3.3V power supply  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
• Fully static operation: no clock or refresh  
required  
Easy memory expansion is provided by using Chip Enable  
and Output Enable inputs, CE and OE. The active LOW  
Write Enable (WE) controls both writing and reading of the  
memory. A data byte allows Upper Byte (UB) and Lower  
Byte (LB) access.  
• Three state outputs  
• Data control for upper and lower bytes  
• Industrial temperature available  
The IS61LV25616AL is packaged in the JEDEC standard  
44-pin400-milSOJ,44-pinTSOPTypeII,44-pinLQFPand  
48-pin Mini BGA (8mm x 10mm).  
FUNCTIONAL BLOCK DIAGRAM  
256K x 16  
MEMORY ARRAY  
A0-A17  
DECODER  
VDD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. A  
1
02/21/03  

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