Datasheet > IS43DR86400D-25DBLI-TR

IS43DR86400D-25DBLI-TR

更新时间： 2024-11-24 22:58:03

品牌	Logo	应用领域
美国芯成 - ISSI		动态存储器
页数	文件大小	规格书
48页	1091K
描述
IC DRAM 512M PARALLEL 60TWBGA

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IS43/46DR86400D

IS43/46DR16320D

64Mx8, 32Mx16 DDR2 DRAM

JANUARY 2015

FEATURES

•ꢀ Vdd = 1.8V 0.1V, Vddq = 1.8V 0.1V

•ꢀ JEDEC standard 1.8V I/O (SSTL_18-compatible)

•ꢀ Double data rate interface: two data transfers

per clock cycle

•ꢀ Differential data strobe (DQS, DQS)

•ꢀ 4-bit prefetch architecture

DESCRIPTION

ISSI's 512Mb DDR2 SDRAM uses a double-data-rate

architecture to achieve high-speed operation. The

double-data rate architecture is essentially a 4n-prefetch

architecture, with an interface designed to transfer two

data words per clock cycle at the I/O balls.

•ꢀ On chip DLL to align DQ and DQS transitions

with CK

ADDRESS TABLE

•ꢀ 4 internal banks for concurrent operation

•ꢀ Programmable CAS latency (CL) 3, 4, 5, and 6

Parameter

64M x 8

32M x 16

Conﬁguration

16M x 8 x 4

8M x 16 x 4

banks

supported

banks

•ꢀ Posted CAS and programmable additive latency

Refresh Count

8K/64ms

(AL) 0, 1, 2, 3, 4, and 5 supported

Row Addressing 16K (A0-A13) 8K (A0-A12)

•ꢀ WRITE latency = READ latency - 1 tCK

•ꢀ Programmable burst lengths: 4 or 8

Column

Addressing

1K (A0-A9)

•ꢀ Adjustable data-output drive strength, full and

reduced strength options

•ꢀ On-die termination (ODT)

Bank Addressing BA0, BA1

BA0, BA1

A10

Precharge

Addressing

A10

OPTIONS

•ꢀ Conﬁguration(s):

KEY TIMING PARAMETERS

64Mx8 (16Mx8x4 banks) IS43/46DR86400D

32Mx16 (8Mx16x4 banks) IS43/46DR16320D

•ꢀ Package:

x8: 60-ball BGA (8mm x 10.5mm)

x16: 84-ball WBGA (8mm x 12.5mm)

•ꢀ Timing – Cycle time

Speed Grade

-25D -3D

tRCD

12.5

tRP

tRC

tRAS

2.5ns @CL=5 DDR2-800D

2.5ns @CL=6 DDR2-800E

3.0ns @CL=5 DDR2-667D

3.75ns @CL=4 DDR2-533C

tCK @CL=3

tCK @CL=4

tCK @CL=5

tCK @CL=6

3.75 3.75

2.5

—

5ns @CL=3 DDR2-400B

•ꢀ Temperature Range:

Commercial (0°C ≤ Tc ≤ 85°C)

Industrial (-40°C ≤ Tc ≤ 95°C; -40°C ≤ Ta ≤ 85°C)

Automotive, A1 (-40°C ≤ Tc ≤ 95°C; -40°C ≤ Ta ≤ 85°C)

Automotive, A2 (-40°C ≤ Tc; Ta ≤ 105°C)

Tc = Case Temp, T^a= Ambient Temp

notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest

version of this device speciﬁcation before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-

ably be expected to cause failure of the life support system or to signiﬁcantly affect its safety or effectiveness. Products are not authorized for use in such applications

unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc. — www.issi.com

Rev. B

1/21/2015

12 3 4 5 6 7...48

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与IS43DR86400D-25DBLI-TR相关器件

型号	品牌	获取价格	描述	数据表
IS43DR86400D-3DBI	ISSI	获取价格	IC DRAM 512M PARALLEL 60TWBGA
IS43DR86400D-3DBI-TR	ISSI	获取价格	IC DRAM 512M PARALLEL 60TWBGA
IS43DR86400D-3DBLI-TR	ISSI	获取价格	IC DRAM 512M PARALLEL 60TWBGA
IS43DR86400E-25DBLI	ISSI	获取价格	DDR DRAM, 64MX8, 0.4ns, CMOS, PBGA60, BGA-60
IS43LD16160A	ISSI	获取价格	Four internal banks for concurrent operation
IS43LD16320A	ISSI	获取价格	Four-bit Pre-fetch DDR Architecture
IS43LD16320A-18BL	ISSI	获取价格	DDR DRAM, 32MX16, CMOS, PBGA134, FBGA-134
IS43LD16320A-25BLI	ISSI	获取价格	DDR DRAM, 32MX16, CMOS, PBGA134, FBGA-134
IS43LD16320A-25BLI-TR	ISSI	获取价格	DDR DRAM,
IS43LD16640A	ISSI	获取价格	Four-bit Pre-fetch DDR Architecture

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