Datasheet > IS42S16400_08

IS42S16400_08

更新时间： 2024-11-05 04:44:43

品牌	Logo	应用领域
美国芯成 - ISSI		/
页数	文件大小	规格书
55页	686K
描述
1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM

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中文翻译

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数据手册

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IS42S16400_08 数据手册

IS42S16400

1 Meg Bits x 16 Bits x 4 Banks (64-MBIT)

SYNCHRONOUS DYNAMIC RAM

JANUARY 2008

FEATURES

OVERVIEW

ISSI'sꢀ64MbꢀSynchronousꢀDRAMꢀIS42S16400ꢀisꢀorganizedꢀ

as1,048,576bitsx16-bitx4-bankforimprovedperformance.

TheꢀsynchronousꢀDRAMsꢀachieveꢀhigh-speedꢀdataꢀtransferꢀ

using pipeline architecture. All inputs and outputs signals

refer to the rising edge of the clock input.

•ꢀ Clock frequency: 166, 143 MHz

•ꢀ Fullyꢀsynchronous;ꢀallꢀsignalsꢀreferencedꢀtoꢀaꢀ

positive clock edge

•ꢀ Internalꢀbankꢀforꢀhidingꢀrowꢀaccess/precharge

•ꢀ Singleꢀ3.3Vꢀpowerꢀsupply

•ꢀ LVTTLꢀinterface

•ꢀ Programmableꢀburstꢀlengthꢀ

PIN CONFIGURATIONS

54-Pin TSOP (Type II)

– (1, 2, 4, 8, full page)

•ꢀ Programmableꢀburstꢀsequence:ꢀ

Sequential/Interleave

VDD

DQ0

VDDQ

DQ1

DQ2

GNDQ

DQ3

DQ4

VDDQ

DQ5

DQ6

GNDQ

DQ7

VDD

LDQM

GND

DQ15

GNDQ

DQ14

DQ13

VDDQ

DQ12

DQ11

GNDQ

DQ10

DQ9

VDDQ

DQ8

GND

•ꢀ Selfꢀrefreshꢀmodes

•ꢀ 4096ꢀrefreshꢀcyclesꢀeveryꢀ64ꢀms

•ꢀ Randomꢀcolumnꢀaddressꢀeveryꢀclockꢀcycle

•ꢀ ProgrammableꢀCAS latency (2, 3 clocks)

•ꢀ Burstꢀread/writeꢀandꢀburstꢀread/singleꢀwriteꢀ

operations capability

•ꢀ Burstꢀterminationꢀbyꢀburstꢀstopꢀandꢀprechargeꢀ

UDQM

CLK

CKE

command

CAS

RAS

•ꢀ ByteꢀcontrolledꢀbyꢀLDQMꢀandꢀUDQM

•ꢀ Package:ꢀꢀ400-milꢀ54-pinꢀTSOPꢀII

BA0

BA1

A10

A11

•ꢀ Lead-freeꢀpackageꢀisꢀavailable

•ꢀ AvailableꢀinꢀIndustrialꢀTemperature

•ꢀ PowerꢀDownꢀandꢀDeepꢀPowerꢀDownꢀMode

•ꢀ PartialꢀArrayꢀSelfꢀRefresh

VDD

GND

•ꢀ TemperatureꢀCompensatedꢀSelfꢀRefresh

•ꢀ OutputꢀDriverꢀStrengthꢀSelectionꢀ(Pleaseꢀcon-

tactꢀProductꢀManagerꢀforꢀmobileꢀfunctionꢀdetail)

PIN DESCRIPTIONS

A0-A11

Address Input

WEꢀ

ꢀ

WriteꢀEnable

BA0,ꢀBA1ꢀ

DQ0ꢀtoꢀDQ15ꢀ

BankꢀSelectꢀAddress

DataꢀI/O

LDQMꢀ

LowerꢀBye,ꢀInput/OutputꢀMask

UpperꢀBye,ꢀInput/OutputꢀMask

Power

UDQMꢀ ꢀ

CLKꢀ

CKEꢀ

ꢀ

SystemꢀClockꢀInput

ClockꢀEnable

VDDꢀ

ꢀ

GNDꢀ

VDDqꢀ

GNDqꢀ

Ground

Chip Select

PowerꢀSupplyꢀforꢀDQꢀPin

GroundꢀforꢀDQꢀPin

No Connection

RASꢀ

CAS

ꢀ

RowꢀAddressꢀStrobeꢀCommand

Column Address Strobe Command

liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device speciﬁcation before relying on

any published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com

Rev. D

01/3008

12 3 4 5 6 7...55

中文翻译

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与IS42S16400_08相关器件

型号	品牌	获取价格	描述	数据表
IS42S16400-10T	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400-10TI	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400-6T	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400-7T	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400-7TI	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400-8T	ISSI	获取价格	Synchronous DRAM, 4MX16, 6ns, CMOS, PDSO54,
IS42S16400A	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400A-10T	ISSI	获取价格	Synchronous DRAM, 4MX16, 7ns, CMOS, PDSO54, 0.400 INCH, TSOP2-54
IS42S16400A-10TI	ISSI	获取价格	Synchronous DRAM, 4MX16, 7ns, CMOS, PDSO54, 0.400 INCH, TSOP2-54
IS42S16400A-10TLI	ISSI	获取价格	Synchronous DRAM, 4MX16, 7ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, TSOP2-54

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