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IS42S16160J-6TL

更新时间： 2024-02-27 16:15:28
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器光电二极管内存集成电路
页数 文件大小 规格书
63页 792K
描述
IC DRAM 256M PARALLEL 54TSOP

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IS42S16160J-6TL 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：TSOP2,Reach Compliance Code：compliant
Factory Lead Time：6 weeks风险等级：2.15
Samacsys Description：DRAM 256M, 3.3V, SDRAM 16Mx16, 166MHz访问模式：FOUR BANK PAGE BURST
最长访问时间：5.4 ns其他特性：PROGRAMMABLE CAS LATENCY; AUTO/SELF REFRESH
JESD-30 代码：R-PDSO-G54长度：22.22 mm
内存密度：268435456 bit内存集成电路类型：SYNCHRONOUS DRAM
内存宽度：16功能数量：1
端口数量：1端子数量：54
字数：16777216 words字数代码：16000000
工作模式：SYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：16MX16
封装主体材料：PLASTIC/EPOXY封装代码：TSOP2
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：1.2 mm
自我刷新：YES最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.8 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：10.16 mm
Base Number Matches：1

IS42S16160J-6TL 数据手册

 浏览型号IS42S16160J-6TL的Datasheet PDF文件第2页浏览型号IS42S16160J-6TL的Datasheet PDF文件第3页浏览型号IS42S16160J-6TL的Datasheet PDF文件第4页浏览型号IS42S16160J-6TL的Datasheet PDF文件第5页浏览型号IS42S16160J-6TL的Datasheet PDF文件第6页浏览型号IS42S16160J-6TL的Datasheet PDF文件第7页 
IS42S83200J, IS42S16160J  
IS45S83200J, IS45S16160J  
SEPTEMBER 2020  
32Meg x 8, 16Meg x16  
256Mb SYNCHRONOUS DRAM  
OVERVIEW  
FEATURES  
ISSI's 256Mb Synchronous DRAM achieves high-speed  
data transfer using pipeline architecture. All inputs and  
outputs signals refer to the rising edge of the clock input.  
The 256Mb SDRAM is organized as follows.  
• Clock frequency: 166, 143, 133 MHz  
• Fully synchronous; all signals referenced to a  
positive clock edge  
• Internal bank for hiding row access/precharge  
• Single Power supply: 3.3V + 0.3V  
• LVTTL interface  
IS42/45S83200J IS42/45S16160J  
8M x 8 x 4 Banks 4M x16x4 Banks  
54-pin TSOPII  
54-ball BGA  
54-pin TSOPII  
54-ball BGA  
• Programmable burst length  
– (1, 2, 4, 8, full page)  
• Programmable burst sequence:  
Sequential/Interleave  
KEY TIMING PARAMETERS  
Parameter  
-6  
-7  
Unit  
• Auto Refresh (CBR)  
• Self Refresh  
Clk Cycle Time  
CAS Latency = 3  
CAS Latency = 2  
6
10  
7
7.5  
ns  
ns  
• 8K refresh cycles every 32 ms (A2 grade) or  
64 ms (commercial, industrial, A1 grade)  
Clk Frequency  
CAS Latency = 3  
CAS Latency = 2  
166  
100  
143  
133  
Mhz  
Mhz  
• Random column address every clock cycle  
• Programmable CAS latency (2, 3 clocks)  
Access Time from Clock  
CAS Latency = 3  
CAS Latency = 2  
5.4  
5.4  
5.4  
5.4  
ns  
ns  
• Burst read/write and burst read/single write  
operations capability  
• Burst termination by burst stop and precharge  
command  
ADDRESS TABLE  
OPTIONS  
Parameter  
32M x 8  
16M x 16  
• Package:  
Configuration  
8M x 8 x 4  
banks  
4M x 16 x 4  
banks  
54-pin TSOP-II  
54-ball BGA  
Refresh Count  
Com./Ind. 8K/64ms  
A1 8K/64ms  
8K/64ms  
8K/64ms  
8K/32ms  
• Operating Temperature Range:  
Commercial (0oC to +70oC)  
A2 8K/32ms  
Industrial (-40oC to +85oC)  
Row Addresses  
A0-A12  
A0-A12  
A0-A8  
Automotive Grade A1 (-40oC to +85oC)  
Automotive Grade A2 (-40oC to +105oC)  
Column Addresses  
Bank Address Pins  
Auto Precharge Pins  
A0-A9  
BA0, BA1  
A10/AP  
BA0, BA1  
A10/AP  
Copyright © 2020 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time with-  
out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain  
the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can  
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such ap-  
plications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. C4  
09/17/2020  
1234567...63

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与IS42S16160J-6TL相关器件

型号 品牌 获取价格 描述 数据表
IS42S16160J-7BL ISSI

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 		IC DRAM 256M PARALLEL 54TFBGA
IS42S16160J-7TL ISSI

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 		Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, TSOP2-54
IS42S16160J-7TLI ISSI

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 		Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, TSOP2-54
IS42S16160J-7TLI-TR ISSI

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 		IC DRAM 256M PARALLEL 54TSOP
IS42S16320B ISSI

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 		64M x 8, 32M x 16 512Mb SYNCHRONOUS DRAM
IS42S16320B-6BL ISSI

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 		64M x 8, 32M x 16 512Mb SYNCHRONOUS DRAM
IS42S16320B-6BLI ISSI

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 		64M x 8, 32M x 16 512Mb SYNCHRONOUS DRAM
IS42S16320B-6BLI-TR ISSI

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 		DRAM
IS42S16320B-6TL ISSI

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 		64M x 8, 32M x 16 512Mb SYNCHRONOUS DRAM
IS42S16320B-6TLI ISSI

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 		64M x 8, 32M x 16 512Mb SYNCHRONOUS DRAM

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