Datasheet > IPDQ65R099CFD7A

IPDQ65R099CFD7A

更新时间： 2024-04-09 19:02:18

品牌	Logo	应用领域
英飞凌 - INFINEON		光电二极管
页数	文件大小	规格书
14页	1475K
描述
The 99m? IPDQ65R099CFD7A in QDPAK top side cooling SMD package is part of the automotive-qualified

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中文翻译

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IPDQ65R099CFD7A 数据手册

650VꢀCoolMOSªꢀCFD7AꢀSJꢀPowerꢀDevice

IPDQ65R099CFD7A

3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics

atꢀT_j=25°C,ꢀunlessꢀotherwiseꢀspecified

Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics

For applications with applied blocking voltage > 425 V, it is required that the customer evaluates the impact of

cosmic radiation effect in early design phase and contacts the Infineon sales office for the necessary technical

support by Infineon.

Values

Parameter

Symbol

Unit Noteꢀ/ꢀTestꢀCondition

Min.

650

3.5

Typ.

Max.

Drain-source breakdown voltage

Gate threshold voltage¹⁾

V_(BR)DSS

V_(GS)th

V_GS=0V,ꢀI_D=1mA

4.5

V_DS=V_GS,ꢀI_D=0.48mA

V_DS=650V,ꢀV_GS=0V,ꢀT_j=25°C

V_DS=650V,ꢀV_GS=0V,ꢀT_j=150°C

Zero gate voltage drain current

I_DSS

I_GSS

R_DS(on)

R_G

µA

Gate-source leakage current incl.

protection diode

V_GS=20V,ꢀV_DS=0V

0.087 0.099

0.194

V_GS=10V,ꢀI_D=9.7A,ꢀT_j=25°C

V_GS=10V,ꢀI_D=9.7A,ꢀT_j=150°C

Drain-source on-state resistance

Gate resistance

Ω

f=250kHz,ꢀopenꢀdrain

Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics

External parasitic elements (PCB layout) influence switching behavior significantly.

Stray inductances and coupling capacitances must be minimized.

For layout recommendations please use provided application notes or contact Infineon sales office.

Values

Parameter

Symbol

Unit Noteꢀ/ꢀTestꢀCondition

Min.

Typ.

1942

Max.

Input capacitance

Output capacitance

C_iss

V_GS=0V,ꢀV_DS=400V,ꢀf=250kHz

C_oss

Effective output capacitance, energy

related²⁾

C_o(er)

C_o(tr)

t_d(on)

t_r

802

V_GS=0V,ꢀV_DS=0...400V

Effective output capacitance, time

related³⁾

I_D=constant,ꢀV_GS=0V,ꢀV_DS=0...400V

V_DD=400V,ꢀV_GS=13V,ꢀI_D=9.7A,

R_G=5.3Ω;ꢀseeꢀtableꢀ9

Turn-on delay time

Rise time

V_DD=400V,ꢀV_GS=13V,ꢀI_D=9.7A,

R_G=5.3Ω;ꢀseeꢀtableꢀ9

V_DD=400V,ꢀV_GS=13V,ꢀI_D=9.7A,

R_G=5.3Ω;ꢀseeꢀtableꢀ9

Turn-off delay time

Fall time

t_d(off)

t_f

V_DD=400V,ꢀV_GS=13V,ꢀI_D=9.7A,

R_G=5.3Ω;ꢀseeꢀtableꢀ9

¹⁾We do not recommend using the CoolMOS mentioned in this datasheet to operate in “linear mode”. For assessment of

potential “linear mode”, please contact Infineon sales office.

²⁾ꢀC_o(er)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀstoredꢀenergyꢀasꢀC_ossꢀwhileꢀV_DSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V

³⁾ꢀC_o(tr)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀchargingꢀtimeꢀasꢀC_ossꢀwhileꢀV_DSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V

Final Data Sheet

Rev.ꢀ2.1,ꢀꢀ2022-12-14

1 2 3 456 7 8...14

中文翻译

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