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IDT74LVCH16501APV PDF预览

IDT74LVCH16501APV

更新时间: 2024-09-15 11:18:59
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
7页 74K
描述
3.3V CMOS 18-BIT REGISTERED BUS TRANSCEIVER WITH 5V TOLERANT I/O AND BUS-HOLD

IDT74LVCH16501APV 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP56,.4
针数:56Reach Compliance Code:not_compliant
风险等级:5.61其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:18.415 mm
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:18功能数量:1
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP56,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:4.6 ns
传播延迟(tpd):5.3 ns认证状态:Not Qualified
座面最大高度:2.794 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:7.5 mm

IDT74LVCH16501APV 数据手册

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3.3V CMOS 18-BIT  
IDT74LVCH16501A  
REGISTERED BUS TRANSCEIVER  
WITH 5V TOLERANT I/O  
AND BUS-HOLD  
FEATURES:  
DESCRIPTION:  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
This 18-bit registered transceiver is built using advanced dual metal  
CMOS technology. This high-speed, low power 18-bit registered bus  
transceivercombinesD-typelatchesandD-typeflip-flopstoallowdataflow  
in transparent latched and clocked modes. Data flow in each direction is  
controlled by output-enable (OEAB and OEBA), latch enable (LEAB and  
LEBA) and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the  
device operates in transparent mode when LEAB is high. When LEAB is  
low,theAdataislatchedifCLKABisheldatahighorlowlogiclevel. IfLEAB  
islow,theAbusdataisstoredinthelatch/flip-floponthelow-to-hightransition  
of CLKAB. OEAB performs the output enable function on the B port. Data  
flow from B port to A port is similar but requires using OEBA, LEBA and  
CLKBA.Flow-throughorganizationofsignalpinssimplifieslayout.Allinputs  
are designed with hysteresis for improved noise margin.  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4µ W typ. static)  
• All inputs, outputs, and I/O are 5V tolerant  
• Supports hot insertion  
• Available in SSOP and TSSOP packages  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Reduced system switching noise  
TheLVCH16501Ahasbeendesignedwitha ±24mAoutputdriver. This  
driver is capable of driving a moderate to heavy load while maintaining  
speedperformance.  
The LVCH16501A has “bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputs  
and eliminates the need for pull-up/down resistors.  
APPLICATIONS:  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
FUNCTIONALBLOCKDIAGRAM  
1
OEAB  
30  
CLKBA  
28  
LEBA  
27  
OEBA  
55  
CLKAB  
2
LEAB  
C
C
D
54  
3
B1  
A1  
D
C
D
C
D
TO 17 OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JANUARY 2004  
1
© 2004 Integrated Device Technology, Inc.  
DSC-3688/2  

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