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IDT74ALVCH16863PAG8 PDF预览

IDT74ALVCH16863PAG8

更新时间: 2024-11-23 19:58:07
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
6页 79K
描述
Bus Transceiver, ALVC/VCX/A Series, 2-Func, 9-Bit, True Output, CMOS, PDSO56, GREEN, TSSOP-56

IDT74ALVCH16863PAG8 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:unknown风险等级:5.73
其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G56JESD-609代码:e3
长度:14 mm逻辑集成电路类型:BUS TRANSCEIVER
位数:9功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):4 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL宽度:6.1 mm
Base Number Matches:1

IDT74ALVCH16863PAG8 数据手册

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IDT74ALVCH16863  
3.3V CMOS 18-BIT  
TRANSCEIVER WITH  
3-STATE OUTPUTS  
AND BUS-HOLD  
DESCRIPTION:  
FEATURES:  
This 18-bit transceiver is built using advanced dual metal CMOS technol-  
ogy. TheALVCH16863 is a noninverting transceiver designed for asynchro-  
nous communication between data buses. The control-function implementa-  
• 0.5 MICRON CMOS Technology  
Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
tion minimizes external timing requirements.  
Thishighspeeddevicecanbeusedastwoindependent9-bittransceivers  
orone18-bittransceiver.ItallowsdatatransmissionfromtheAbustotheBbus  
orfromtheBbustotheAbus,dependingonthelogiclevelattheoutput-enable  
(OEABorOEBA)inputs.  
The ALVCH16863 has been designed with a ±24mA output driver. This  
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed  
performance.  
VCC = 3.3V ± 0.3V, Normal Range  
VCC = 2.7V to 3.6V, Extended Range  
VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4μ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
Available in TSSOP package  
The ALVCH16863 has bus-hold” which retains the inputs’ last state  
whenevertheinputbusgoestoahighimpedance. Thispreventsfloatinginputs  
andeliminatestheneedforpull-up/downresistors  
DRIVE FEATURES:  
High Output Drivers: ±24mA  
• Suitable for heavy loads  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
56  
29  
1OEBA  
2OEBA  
1
28  
1OEAB  
2OEAB  
55  
41  
2
16  
1A1  
2B1  
1B1  
2A1  
TO EIGHT OTHER CHANNELS  
TO EIGHT OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JANUARY 2004  
1
© 2004 Integrated Device Technology, Inc.  
DSC-4542/5  

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