Datasheet > IDT74ALVCH16903PF

IDT74ALVCH16903PF

更新时间： 2024-11-23 20:17:31

品牌	Logo	应用领域
艾迪悌 - IDT		驱动光电二极管逻辑集成电路触发器电视
页数	文件大小	规格书
15页	238K
描述
Bus Driver, ALVC/VCX/A Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56, TVSOP-56

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IDT74ALVCH16903PF 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	SSOP	包装说明：	TVSOP-56
针数：	56	Reach Compliance Code：	not_compliant
风险等级：	5.92	Is Samacsys：	N
其他特性：	WITH PARITY CHECKER	控制类型：	COMMON CONTROL
计数方向：	UNIDIRECTIONAL	系列：	ALVC/VCX/A
JESD-30 代码：	R-PDSO-G56	JESD-609代码：	e0
长度：	11.3 mm	逻辑集成电路类型：	BUS DRIVER
最大I（ol）：	0.024 A	湿度敏感等级：	1
位数：	12	功能数量：	1
端口数量：	2	端子数量：	56
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP56,.25,16	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	电源：	3.3 V
Prop。Delay @ Nom-Sup：	3.8 ns	传播延迟（tpd）：	6.1 ns
认证状态：	Not Qualified	座面最大高度：	1.2 mm
子类别：	Bus Driver/Transceivers	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	2.7 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn85Pb15)
端子形式：	GULL WING	端子节距：	0.4 mm
端子位置：	DUAL	翻译：	N/A
触发器类型：	POSITIVE EDGE	宽度：	4.4 mm
Base Number Matches：	1

IDT74ALVCH16903PF 数据手册

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IDT74ALVCH16903

3.3V CMOS 12-BIT UNIVERSAL BUS DRIVER W/PARITY CHECKER

EXTENDED COMMERCIAL TEMPERATURE RANGE

3.3V CMOS 12-BIT UNIVERSAL

BUS DRIVER WITH PARITY

IDT74ALVCH16903

CHECKER, DUAL 3-STATE

OUTPUTS AND BUS-HOLD

DESCRIPTION:

FEATURES:

This 12-bit universal bus driver is built using advanced dual metal

CMOS technology. This device has dual outputs and can operate as a

buffer or an edge-triggered register. In both modes, parity is checked on

APAR, which arrives one cycle after the data to which it applies. The

YERR output, which is produced one cycle after APAR, is open drain.

–

0.5 MICRON CMOS Technology

Typicalt^SK(0)(Output Skew) < 250ps

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

0.635mm pitch SSOP, 0.50mm pitch TSSOP,

and 0.40mm pitch TVSOP packages

–

MODE selects one of the two data paths. When MODE is low, the

device operates as an edge-triggered register. On the positive transition

of the clock (CLK) input and when the clock-enable (CLKEN) input is low,

data setup at the A inputs is stored in the internal registers. On the positive

transition of CLK and when CLKEN is high, only data setup at the 9A-12A

inputs is stored in their internal registers. When MODE is high, the device

operates as a buffer and data at the A inputs passes directly to the

outputs. The 11A/YERREN serves a dual purpose; it acts as a normal

data bit and also enables YERR data to be clocked into the YERR output

–

Extended commercial range of – 40°C to + 85°C

V^CC= 3.3V ± 0.3V, Normal Range

V^CC= 2.7V to 3.6V, Extended Range

V^CC= 2.5V ± 0.2V

CMOS power levels (0.4µW typ. static)

Rail-to-Rail output swing for increased noise margin

Drive Features for ALVCH16903:

–

High Output Drivers: ±24mA

Suitable for heavy loads

When used as a single device, parity output enable (PAROE) must be

tied high; when parity input/output (PARI/O) is low, even parity is selected

and when PARI/O is high, odd parity is selected. When used in pairs and

PAROE is low, the parity sum is output on PARI/O for cascading to the

second ALVCH16903. When used in pairs and PAROE is high, PARI/O

accepts a partial parity sum from the first ALVCH16903.

APPLICATIONS:

• 3.3V High Speed Systems

• 3.3V and lower voltage computing systems

A buffered output-enable (OE) input can be used to place the 24

outputs and YERR in either a normal logic state (high or low logic levels)

or a high-impedance state. In the high-impedance state, the outputs

neither load nor drive the bus lines significantly. The high-impedance

state and increased drive provide the capability to drive bus lines without

need for interface or pullup components.

ABSOLUTE MAXIMUM RATING ⁽¹⁾

Symbol

Description

Terminal Voltage

Max.

Unit

(2)

VTERM

– 0.5 to + 4.6

with Respect to GND

Terminal Voltage

(3)

VTERM

– 0.5 to

VCC + 0.5

with Respect to GND

Storage Temperature

The ALVCH16903 has been designed with a ±24mA output driver.

This driver is capable of driving a moderate to heavy load while

maintaining speed performance.

TSTG

IOUT

IIK

– 65 to + 150

°C

DC Output Current

– 50 to + 50

± 50

Continuous Clamp Current,

The ALVCH16903 has “bus-hold” which retains the inputs’ last state

whenever the input bus goes to a high-impedance. This prevents

floating inputs and eliminates the need for pull-up/down resistors.

VI < 0 or VI VCC

IOK

Continuous Clamp Current, VO < 0

– 50

ICC

ISS

Continuous Current through

each VCC or GND

±100

NEW16link

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at these or

any other conditions above those indicated in the operational sections

of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

2. V^CCterminals.

3. All terminals except V^CC.

EXTENDED COMMERCIAL TEMPERATURE RANGE

APRIL 1999

1999 Integrated Device Technology, Inc.

DSC-4911/-

12 3 4 5 6 7...15

中文翻译

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与IDT74ALVCH16903PF相关器件

型号	品牌	获取价格	描述	数据表
IDT74ALVCH16903PV	IDT	获取价格	3.3V CMOS 12-BIT UNIVERSAL BUS DRIVER WITH PARITY CHECKER, DUAL 3-STATE OUTPUTS AND BUS-HO
IDT74ALVCH16903PV8	IDT	获取价格	Bus Driver, ALVC/VCX/A Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56, SSOP-56
IDT74ALVCH16952	IDT	获取价格	3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH16952PA	IDT	获取价格	3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH16952PA8	IDT	获取价格	Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0
IDT74ALVCH16952PAG	IDT	获取价格	Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0
IDT74ALVCH16952PF	IDT	获取价格	3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH16952PV	IDT	获取价格	3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH16952PV8	IDT	获取价格	Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0
IDT74ALVCH16952PVG	IDT	获取价格	Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0

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