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IDT74ALVCH16901PAG8 PDF预览

IDT74ALVCH16901PAG8

更新时间： 2024-11-26 14:42:47
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
9页 92K
描述
Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO64, GREEN, TSSOP-64

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IDT74ALVCH16901PAG8 技术参数

生命周期：Obsolete零件包装代码：TSSOP
包装说明：GREEN, TSSOP-64针数：64
Reach Compliance Code：unknown风险等级：5.73
Is Samacsys：N其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; WITH PARITY GENERATOR/CHECKER
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G64
JESD-609代码：e3长度：17 mm
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER位数：8
功能数量：2端口数量：2
端子数量：64最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟（tpd）：5.8 ns
认证状态：Not Qualified座面最大高度：1.1 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：MATTE TIN端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
宽度：6.1 mmBase Number Matches：1

IDT74ALVCH16901PAG8 数据手册

 浏览型号IDT74ALVCH16901PAG8的Datasheet PDF文件第2页浏览型号IDT74ALVCH16901PAG8的Datasheet PDF文件第3页浏览型号IDT74ALVCH16901PAG8的Datasheet PDF文件第4页浏览型号IDT74ALVCH16901PAG8的Datasheet PDF文件第5页浏览型号IDT74ALVCH16901PAG8的Datasheet PDF文件第6页浏览型号IDT74ALVCH16901PAG8的Datasheet PDF文件第7页 
3.3V CMOS 18-BIT  
UNIVERSAL BUS TRANSCEIVER  
IDT74ALVCH16901  
WITH PARITY GENERATORS/  
CHECKERS AND BUS-HOLD  
DESCRIPTION:  
FEATURES:  
This 18-bituniversalbus transceiveris builtusingadvanceddualmetal  
CMOS technology. The ALVCH16901 is a dual 9-bit to dual 9-bit parity  
transceiver with registers. The device can operate as a feed-through  
transceiveroritcangenerate/checkparityfromthetwo8-bitdatabuses in  
eitherdirection.  
• 0.5 MICRON CMOS Technology  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4μ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Available in TSSOP package  
The ALVCH16901 features independent clock (CLKAB or CLKBA),  
latch-enable (LEAB or LEBA), and dual 9-bit clock enable (CLKENAB or  
CLKENBA)inputs. Italsoprovides parity-enable (SEL)andparity-select  
(ODD/EVEN)inputs andseparateerror-signal(ERRAandERRB)outputs  
for checking parity. The direction of data flow is controlled by OEAB and  
OEBA.WhenSELislow,theparityfunctionsareenabled. WhenSELishigh,  
theparityfunctionsaredisabledandthedeviceactsasan18-bitregistered  
transceiver.  
The ALVCH16901has beendesignedwitha ±24mAoutputdriver.This  
driver is capable of driving a moderate to heavy load while maintaining  
speedperformance.  
The ALVCH16901 has “bus-hold” which retains the inputs’ last state  
wheneverthe inputbus goes toa highimpedance. This prevents floating  
inputs andeliminates the needforpull-up/downresistors.  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Suitable for heavy loads  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
2
LEAB  
1
2
1CLKENAB  
2CLKENAB  
32  
3
CLKAB  
OEAB  
30  
35  
OEBA  
1B1-1B8  
1A1-1A8  
1APAR  
18  
18  
18-Bit  
Storage QA  
18  
60  
5
B-Port  
Parity  
Generate  
and  
Check  
A Data  
A-Port  
Parity  
Generate  
and  
Check  
B Data  
1BPAR  
61  
4
1ERRA  
2B1-2A8  
1ERRB  
2A1-2A8  
2APAR  
2ERRB  
37  
29  
28  
36  
2BPAR  
2ERRA  
18-Bit  
Storage  
18  
QB  
34  
31  
ODD/EVEN  
SEL  
62  
CLKBA  
64  
33  
1CLKENBA  
2CLKENBA  
2
63  
LEBA  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JUNE 2006  
1
©2006 Integrated Device Technology, Inc.  
DSC-4582/3  
1234567...9

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IDT74ALVCH16903PA IDT

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IDT74ALVCH16903PAG IDT

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IDT74ALVCH16903PAG8 IDT

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IDT74ALVCH16903PV IDT

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 		3.3V CMOS 12-BIT UNIVERSAL BUS DRIVER WITH PARITY CHECKER, DUAL 3-STATE OUTPUTS AND BUS-HO
IDT74ALVCH16903PV8 IDT

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IDT74ALVCH16952 IDT

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 		3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH16952PA IDT

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 		3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH16952PA8 IDT

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