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ICS85401AKT PDF预览

ICS85401AKT

更新时间: 2024-11-11 20:26:07
品牌 Logo 应用领域
艾迪悌 - IDT 逻辑集成电路
页数 文件大小 规格书
11页 215K
描述
Multiplexer, 85401 Series, 1-Func, 2 Line Input, 1 Line Output, Complementary Output, 3 X 3 MM, 0.95 MM HEIGHT, MO-220, VQFN-16

ICS85401AKT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN, LCC16,.12SQ,20针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.87Is Samacsys:N
系列:85401JESD-30 代码:S-XQCC-N16
JESD-609代码:e0长度:3 mm
逻辑集成电路类型:MULTIPLEXER功能数量:1
输入次数:2输出次数:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC16,.12SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):225
电源:3.3 VProp。Delay @ Nom-Sup:0.46 ns
传播延迟(tpd):0.46 ns认证状态:Not Qualified
座面最大高度:1 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

ICS85401AKT 数据手册

 浏览型号ICS85401AKT的Datasheet PDF文件第2页浏览型号ICS85401AKT的Datasheet PDF文件第3页浏览型号ICS85401AKT的Datasheet PDF文件第4页浏览型号ICS85401AKT的Datasheet PDF文件第5页浏览型号ICS85401AKT的Datasheet PDF文件第6页浏览型号ICS85401AKT的Datasheet PDF文件第7页 
ICS85401  
2:1  
TO-LVDS MULTIPLEXER  
Integrated  
Circuit  
Systems, Inc.  
D
IFFERENTIAL  
-
GENERAL DESCRIPTION  
FEATURES  
The ICS85401 is a high performance 2:1 Differ- 2:1 LVDS MUX  
ICS  
ential-to-LVDS Multiplexer and a member of the  
1 LVDS output  
HiPerClockS™  
HiPerClockS™family of High Performance Clock  
Solutions from ICS.The ICS85401 can also per-  
form differential translation because the differ-  
ential inputs accept LVPECL, CML as well as LVDS levels.  
The ICS85401 is packaged in a small 3mm x 3mm  
16 VFQFN package, making it ideal for use on space con-  
strained boards.  
2 differential clock inputs can accept: LVPECL, LVDS, CML  
Maximum input/output frequency: >2.5GHz  
Translates LVCMOS/LVTTL input signals to LVDS levels by  
using a resistor bias network on nCLK0, nCLK1  
Propagation delay: 460ps (maximum)  
Part-to-part skew: 100ps (maximum)  
3.3V operating supply  
-40°C to 85°C ambient operating temperature  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
CLK0  
nCLK0  
0
16 15 14 13  
CLK0  
1
2
12 GND  
11  
10 nQ  
GND  
Q
nQ  
nCLK1  
Q
CLK1  
nCLK1  
1
CLK1  
3
4
nCLK1  
9
5
6
7
8
CLK_SEL  
ICS85401  
16-LeadVFQFN  
3mm x 3mm x 0.95 package body  
K Package  
TopView  
85401AK  
www.icst.com/products/hiperclocks.h  
REV. A AUGUST 23, 2004  
1

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