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ICS854104AGT PDF预览

ICS854104AGT

更新时间: 2024-11-11 14:51:23
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
15页 359K
描述
Low Skew Clock Driver, 854104 Series, 4 True Output(s), 0 Inverted Output(s), PDSO16, 4.40 X 5 MM, 0.92 MM HEIGHT, MO-153, TSSOP-16

ICS854104AGT 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:4.40 X 5 MM, 0.92 MM HEIGHT, MO-153, TSSOP-16针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.44Is Samacsys:N
系列:854104输入调节:DIFFERENTIAL
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:5 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:16
实输出次数:4最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:4.4 mmBase Number Matches:1

ICS854104AGT 数据手册

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Low Skew, 1-to-4,  
Differential-to-LVDS Fanout Buffer  
ICS854104  
DATASHEET  
General Description  
Features  
The ICS854104 is a low skew, high performance 1-to-4  
Differential-to-LVDS Clock Fanout Buffer. Utilizing Low Voltage  
Differential Signaling (LVDS), the ICS854104 provides a low power,  
low noise, solution for distributing clock signals over controlled  
impedances of 100. The ICS854104 accepts a differential input  
level and translates it to LVDS output levels.  
Four differential LVDS output pairs  
One differential clock input pair  
CLK/nCLK can accept the following differential input levels:  
LVPECL, LVDS, LVHSTL, HCSL, SSTL  
Each output has an individual OE control  
Maximum output frequency: 700MHz  
Translates differential input signals to LVDS levels  
Additive phase jitter, RMS: 0.232ps (typical)  
Output skew: 50ps (maximum)  
Guaranteed output and part-to-part skew characteristics make the  
ICS854104 ideal for those applications demanding well defined  
performance and repeatability.  
Part-to-part skew: 350ps (maximum)  
Propagation delay: 1.3ns (maximum)  
3.3V operating supply  
0°C to 70°C ambient operating temperature  
Lead-free (RoHS 6) packaging  
Block Diagram  
Pin Assignment  
Q0  
OE0  
OE1  
OE2  
VDD  
Q0  
1
2
3
4
5
6
7
8
16  
15  
nQ0  
nQ0  
14 Q1  
Pullup  
OE0  
13  
12  
11  
10  
9
nQ1  
Q2  
GND  
CLK  
Q1  
nQ2  
Q3  
nCLK  
OE3  
nQ1  
Pulldown  
CLK  
nQ3  
Pullup  
OE1  
Pullup/Pulldown  
nCLK  
Q2  
ICS854104  
nQ2  
16-Lead TSSOP  
4.4mm x 5.0mm x 0.925mm package body  
G Package  
Pullup  
OE2  
Q3  
Top View  
nQ3  
Pullup  
OE3  
ICS854104AG REVISION A JANUARY 30, 2014  
1
©2014 Integrated Device Technology, Inc.  

ICS854104AGT 替代型号

型号 品牌 替代类型 描述 数据表
ICS854104AGLFT IDT

完全替代

Low Skew Clock Driver, 854104 Series, 4 True Output(s), 0 Inverted Output(s), PDSO16, 4.40
ICS854104AG IDT

完全替代

Low Skew Clock Driver, 854104 Series, 4 True Output(s), 0 Inverted Output(s), PDSO16, 4.40

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