5秒后页面跳转
ICS8431AM-01T PDF预览

ICS8431AM-01T

更新时间: 2024-11-04 06:59:47
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
7页 96K
描述
Clock Generator, 200MHz, PDSO28, SOIC-28

ICS8431AM-01T 数据手册

 浏览型号ICS8431AM-01T的Datasheet PDF文件第2页浏览型号ICS8431AM-01T的Datasheet PDF文件第3页浏览型号ICS8431AM-01T的Datasheet PDF文件第4页浏览型号ICS8431AM-01T的Datasheet PDF文件第5页浏览型号ICS8431AM-01T的Datasheet PDF文件第6页浏览型号ICS8431AM-01T的Datasheet PDF文件第7页 
PRELIMINARY  
Integrated  
Circuit  
Systems, Inc.  
ICS8431-01  
CLOCK SYNTHESIZER  
GENERAL DESCRIPTION  
FEATURES  
The ICS8431-01 is a general purpose clock Fully integrated PLL  
,&6  
frequency synthesizer and a member of the  
Differential 3.3V LVPECLoutput  
200MHz output frequency  
HiPerClockS™ HiPerClockS™ family of High Performance  
Clock Solutions from ICS. The ICS8431-01  
consists of one independent low bandwidth PLL  
Crystal oscillator interface  
timing channel. A 16.666MHz crystal is used as the input to  
the on-chip oscillator. The M and N dividers are configured to  
produce a fixed output frequency of 200MHz.  
Spread Spectrum Clocking (SSC) fixed at 1/2% modulation  
for environments requiring ultra low EMI  
Programmable features of the ICS8431-01 support four op-  
erational modes. The four modes are spread spectrum clock-  
ing (SSC), non-spread spectrum clock and two test modes  
and are controlled by the Power Up Latch. After power up  
the latch is disabled and the initial programmed values can  
only be overwritten by removing all power to the device.  
LVTTL/ LVCMOS control inputs  
PLL bypass modes supporting in-circuit testing and on-chip  
functional block characterization  
28 lead SOIC  
In SSC mode the output clock is modulated in order to achieve  
a reduction in EMI. In one of the PLL bypass test modes the  
PLL is disconnected as the source to the differential output  
allowing an external source to be connnected to the  
TEST_I/O pin. This is useful for in-circuit testing and allows  
the differential output to be driven at a lower frequency  
throughout the system clock tree. In the other PLL bypass  
mode the oscillator divider is used as the source to both the  
M and N dividers. In this configuration the frequency at FOUT,  
nFOUT equals the crystal frequency divide by 16 divided by  
N. The frequency at TEST I/O equals the crystal frequency  
divide by 16 divided by M. This is useful for characterizing  
the oscillator and internal dividers.  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
XTAL1  
OSC  
XTAL2  
nc  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
nc  
nc  
nc  
nc  
nc  
nc  
2
3
4
5
6
7
VDDI  
XTAL2  
XTAL1  
nc  
nc  
VDDA  
nc  
nc  
nc  
VDDO  
FOUT  
nFOUT  
GND  
÷ 16  
PLL  
nc  
PHASE  
DETECTOR  
nc  
nc  
8
9
VCO  
SSC_CTL0  
SSC_CTL1  
GNDT  
TEST_I/O  
VDDT  
10  
11  
12  
13  
14  
÷ N  
FOUT  
nFOUT  
÷ M  
TEST_I/O  
ICS8431-01  
SSC_CTL0  
SSC_CTL1  
Power  
Up  
Latch  
28-Lead SOIC  
M Package  
Top View  
Configuration Logic  
8431-01  
www.icst.com  
SEPTEMBER 13, 2000  
1

与ICS8431AM-01T相关器件

型号 品牌 获取价格 描述 数据表
ICS8431AM-11T IDT

获取价格

Clock Generator, 400MHz, PDSO28, SOIC-28
ICS8431AM-21 ICSI

获取价格

350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8431AM-21LF ICSI

获取价格

350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8431AM-21LFT ICSI

获取价格

350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8431AM-21T ICSI

获取价格

350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8431AMI-21 ICSI

获取价格

350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8431AMI-21LF ICSI

获取价格

350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8431AMI-21LFT ICSI

获取价格

350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8431AMI-21T ICSI

获取价格

350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8431CM-01 ICSI

获取价格

200MHZ, LOW JITTER, LVPECL FREQUENCY SYNTHESIZER