Datasheet > IBM13N8734HCC-360T

IBM13N8734HCC-360T

更新时间： 2024-10-29 21:04:39

品牌	Logo	应用领域
国际商业机器公司 - IBM		时钟动态存储器内存集成电路
页数	文件大小	规格书
19页	361K
描述
Synchronous DRAM Module, 8MX72, 6ns, CMOS, DIMM-168

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IBM13N8734HCC-360T 技术参数

生命周期：	Obsolete	零件包装代码：	DIMM
包装说明：	DIMM, DIMM168	针数：	168
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.32.00.32	风险等级：	5.84
Is Samacsys：	N	访问模式：	SINGLE BANK PAGE BURST
最长访问时间：	6 ns	其他特性：	AUTO/SELF REFRESH
最大时钟频率 (fCLK)：	100 MHz	I/O 类型：	COMMON
JESD-30 代码：	R-XDMA-N168	内存密度：	603979776 bit
内存集成电路类型：	SYNCHRONOUS DRAM MODULE	内存宽度：	72
功能数量：	1	端口数量：	1
端子数量：	168	字数：	8388608 words
字数代码：	8000000	工作模式：	SYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：
组织：	8MX72	输出特性：	3-STATE
封装主体材料：	UNSPECIFIED	封装代码：	DIMM
封装等效代码：	DIMM168	封装形状：	RECTANGULAR
封装形式：	MICROELECTRONIC ASSEMBLY	电源：	3.3 V
认证状态：	Not Qualified	刷新周期：	4096
自我刷新：	YES	最大待机电流：	0.009 A
子类别：	DRAMs	最大压摆率：	1.26 mA
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	3 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	NO
技术：	CMOS	温度等级：	COMMERCIAL
端子形式：	NO LEAD	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

IBM13N8734HCC-360T 数据手册

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IBM13N8644HCC

IBM13N8734HCC

8M x 64/72 One-Bank Unbuffered SDRAM Module

Features

• 168-Pin Unbuffered 8-Byte Dual In-Line Memory

Module

• Programmable Operation:

- CAS Latency: 2, 3

• 8Mx64/72 Synchronous DRAM DIMM

• Three speed sorts:

- Burst Type: Sequential or Interleave

- Burst Length: 1, 2, 4, 8, Full-Page

(Full-Page supports Sequential burst only)

- Operation: Burst Read and Write or Multiple

Burst Read with Single Write

• -260 and -360 for PC100 applications

• -10 for 66MHz applications (typical)

• Inputs and outputs are LVTTL (3.3V) compatible

• Single 3.3V ± 0.3V Power Supply

• Single Pulsed RAS interface

• Suspend Mode and Power Down Mode

• 12/9/2 Addressing (Row/Column/Bank)

• 4096 Refresh cycles distributed across 64ms

• Serial Presence Detect

• SDRAMs have 4 internal banks

• Module has 1 bank

• Fully Synchronous to positive Clock Edge

• Data Mask for Byte Read/Write control

• Auto Refresh (CBR) and Self Refresh

• Automatic and controlled Precharge commands

• Card size: 5.25" x 1.375" x 0.106"

• Gold contacts

• SDRAMs in TSOP Type II Package

Description

IBM13N8644HCC / IBM13N8734HCC are unbuf-

fered 168-pin Synchronous DRAM Dual In-Line

Memory Modules (DIMMs) which are organized as

8Mx64 and 8Mx72 high-speed memory arrays. The

DIMMs use eight (8Mx64) or nine (8Mx72) 8Mx8

SDRAMs in 400mil TSOP II packages. The DIMMs

achieve high-speed data transfer rates of up to

100MHz by employing a prefetch/pipeline hybrid

architecture that supports the JEDEC 1N rule while

allowing very low burst power.

ating modes are defined by combinations of RAS,

CAS, WE, S0/S2, DQMB, and CKE0 signals. A

command decoder initiates the necessary timings

for each operation. A 14-bit address bus accepts

address information in a row/column multiplexing

arrangement.

Prior to any Access operation, the CAS latency,

burst type, burst length, and Burst operation type

must be programmed into the DIMM by address

inputs A0-A9 during the Mode Register Set cycle.

The -10 speed sort DIMMs comply with JEDEC

standards for 168-pin unbuffered SDRAM DIMMs.

The DIMM uses serial presence detects imple-

mented via a serial EEPROM using the two-pin IIC

protocol. The first 128 bytes of serial PD data are

used by the DIMM manufacturer. The last 128 bytes

are available to the customer.

The -260 and -360 speed sort DIMMs are compati-

ble with the Intel PC100 SDRAM unbuffered DIMM

specification.

All control, address, and data input/output circuits

are synchronized with the positive edge of the exter-

nally supplied clock inputs.

All IBM 168-pin DIMMs provide a high-performance,

flexible 8-byte interface in a 5.25" long space-saving

footprint. Related products include both EDO DRAM

and SDRAM unbuffered DIMMs in both non-parity

x64 and ECC-Optimized x72 configurations.

All inputs are sampled at the positive edge of each

externally supplied clock (CK0, CK2). Internal oper-

Card Outline

(Front)

(Back)

10 11

94 95

168

40 41

124 125

19L7295.E93875B

12/99

Use is further subject to the provisions at the end of this document.

Page 1 of 19

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与IBM13N8734HCC-360T相关器件

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