HSP45116
Data Sheet
May 1999
File Number 2485.7
Numerically Controlled
Oscillator/Modulator
Features
• NCO and CMAC on One Chip
The Intersil HSP45116 combines a high performance
quadrature Numerically Controlled Oscillator (NCO) and a
high speed 16-bit Complex Multiplier/Accumulator (CMAC)
on a single IC. This combination of functions allows a
complex vector to be multiplied by the internally generated
(cos, sin) vector for quadrature modulation and
• 15MHz, 25.6MHz, 33MHz Versions
• 32-Bit Frequency Control
• 16-Bit Phase Modulation
• 16-Bit CMAC
• 0.008Hz Tuning Resolution at 33MHz
• Spurious Frequency Components < -90dBc
• Fully Static CMOS
demodulation. As shown in the Block Diagram, the
HSP45116 is divided into three main sections. The
Phase/Frequency Control Section (PFCS) and the
Sine/Cosine Section together form a complex NCO. The
CMAC multiplies the output of the Sine/ Cosine Section with
an external complex vector.
Applications
• Frequency Synthesis
• Modulation - AM, FM, PSK, FSK, QAM
• Demodulation, PLL
The inputs to the Phase/Frequency Control Section consist
of a microprocessor interface and individual control lines.
The phase resolution of the PFCS is 32 bits, which results in
frequency resolution better than 0.008Hz at 33MHz. The
output of the PFCS is the argument of the sine and cosine.
The spurious free dynamic range of the complex sinusoid is
greater than 90dBc.
• Phase Shifter
• Polar to Cartesian Conversions
Ordering Information
The output vector from the Sine/Cosine Section is one of the
inputs to the Complex Multiplier/Accumulator. The CMAC
multiplies this (cos, sin) vector by an external complex vector
and can accumulate the result. The resulting complex vectors
are available through two 20-bit output ports which maintain
the 90dB spectral purity. This result can be accumulated
internally to implement an accumulate and dump filter.
TEMP.
o
PART NUMBER
HSP45116VC-15
HSP45116VC-25
HSP45116GC-15
HSP45116GC-25
HSP45116GC-33
HSP45116GI-15
HSP45116GI-25
HSP45116GI-33
RANGE ( C) PACKAGE
PKG. NO.
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
160 Ld MQFP Q160.28x28
160 Ld MQFP Q160.28x28
145 Ld CPGA G145.A
145 Ld CPGA G145.A
145 Ld CPGA G145.A
A quadrature down converter can be implemented by
loading a center frequency into the Phase/Frequency
Control Section. The signal to be down converted is the
Vector Input of the CMAC, which multiplies the data by the
rotating vector from the Sine/Cosine Section. The resulting
complex output is the down converted signal.
-40 to 85 145 Ld CPGA G145.A
-40 to 85 145 Ld CPGA G145.A
-40 to 85 145 Ld CPGA G145.A
HSP45116GM-15/883 -55 to 125 145 Ld CPGA G145.A
HSP45116GM-25/883 -55 to 125 145 Ld CPGA G145.A
HSP45116AVC-52
0 to 70
160 Ld MQFP Q160.28x28
† This part has its own data sheet under HSP45116A, AnswerFAX
document no. 4156.
Block Diagram
VECTOR INPUT
R
I
SINE/
COSINE
ARGUMENT
MICROPROCESSOR
PHASE/
SIN
INTERFACE
SINE/
COSINE
SECTION
FREQUENCY
CMAC
CONTROL
COS
INDIVIDUAL
SECTION
CONTROL SIGNALS
R
I
VECTOR OUTPUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1