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HM5225645FBP-B60 PDF预览

HM5225645FBP-B60

更新时间: 2024-10-27 20:59:51
品牌 Logo 应用领域
瑞萨 - RENESAS 动态存储器内存集成电路
页数 文件大小 规格书
16页 144K
描述
4MX64 SYNCHRONOUS DRAM, 6ns, PBGA108, 14 X 22 MM, 1.27 MM PITCH, BUMP, BGA-108

HM5225645FBP-B60 技术参数

生命周期:Contact Manufacturer零件包装代码:BGA
包装说明:BGA,针数:108
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.24风险等级:5.62
访问模式:FOUR BANK PAGE BURST最长访问时间:6 ns
其他特性:AUTO/SELF REFRESHJESD-30 代码:R-PBGA-B108
JESD-609代码:e1长度:22 mm
内存密度:268435456 bit内存集成电路类型:SYNCHRONOUS DRAM
内存宽度:64功能数量:1
端口数量:1端子数量:108
字数:4194304 words字数代码:4000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:4MX64
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:RECTANGULAR封装形式:GRID ARRAY
认证状态:Not Qualified座面最大高度:2.1 mm
自我刷新:YES最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:TIN SILVER COPPER
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM宽度:14 mm
Base Number Matches:1

HM5225645FBP-B60 数据手册

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HM5225645F-B60  
HM5225325F-B60  
256M LVTTL interface SDRAM  
100 MHz  
1-Mword × 64-bit × 4-bank/2-Mword × 32-bit × 4-bank  
PC/100 SDRAM  
ADE-203-1014C (Z)  
Rev. 1.0  
Oct. 1, 1999  
Description  
The Hitachi HM5225645F is a 256-Mbit SDRAM organized as 1048576-word × 64-bit × 4-bank. The Hitachi  
HM5225325F is a 256-Mbit SDRAM organized as 2097152-word × 32-bit × 4-bank. All inputs and outputs  
are referred to the rising edge of the clock input. It is packaged in standard 108 bump BGA.  
Features  
Single chip wide bit solution (× 64/× 32)  
3.3 V power supply  
Clock frequency: 100 MHz (max)  
LVTTL interface  
Extremely small foot print: 1.27 mm pitch  
Package: BGA (BP-108)  
4 banks can operate simultaneously and independently  
Burst read/write operation and burst read/single write operation capability  
Programmable burst length: 4/8/full page  
2 variations of burst sequence  
Sequential (BL = 4/8/full page)  
Interleave (BL = 4/8)  
Programmable CAS latency: 2/3  
Byte control by DQMB  

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