Datasheet > HCF40100

HCF40100

更新时间： 2024-11-03 23:54:55

品牌	Logo	应用领域
其他 - ETC		移位寄存器
页数	文件大小	规格书
11页	530K
描述
32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER

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中文翻译

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数据手册

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HCF40100 数据手册

HCF40100B

32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER

■

FULLY STATIC OPERATION

SHIFT LEFT/SHIFT RIGHT CAPABILITY

MULTIPLE PACKAGE CASCADING

RECIRCULATE CAPABILITY

LIFO OR FIFO CAPABILITY

STANDARDIZED SYMMETRICAL OUTPUT

CHARACTERISTICS

DIP

SOP

■

QUIESCENT CURRENT SPECIF. UP TO 20V

5V, 10V AND 15V PARAMETRIC RATINGS

INPUT LEAKAGE CURRENT

ORDER CODES

PACKAGE

TUBE

T & R

I = 100nA (MAX) AT V = 18V T = 25°C

DIP

HCF40100BEY

HCF40100BM1

■

100% TESTED FOR QUIESCENT CURRENT

SOP

HCF40100M013TR

MEETS ALL REQUIREMENTS OF JEDEC

JESD13B "STANDARD SPECIFICATIONS

FOR DESCRIPTION OF B SERIES CMOS

DEVICES"

provided the CLOCK INHIBIT is low. The state of

the LEFT/RIGHT CONTROL, RECIRCULATE

CONTROL, and CLOCK INHIBIT should not be

changed when the CLOCK is high. Data is

synchronously shifted one stage left or one stage

right depending on the state of the LEFT/RIGHT

CONTROL, with the positive CLOCK edge. Data

clocked into the first of 32 register states is

available at the SHIFT LEFT or SHIFT RIGHT

OUTPUT respectively, on the next negative

CLOCK transition (see Data Transfer Table). No

shifting occurs on the positive CLOCK edge if the

CLOCK INHIBIT line is at a high level. With the

RECIRCULATE CONTROL low, data in the 32nd

stage is shifted into the first stage when the LEFT/

RIGHT CONTROL is low and from the 1st stage to

the 32nd stage when the LEFT/RIGHT CONTROL

is high.

DESCRIPTION

HCF40100B is a monolithic integrated circuit

fabricated in Metal Oxide Semiconductor

technology available in DIP and SOP packages.

HCF40100B is a 32-stage shift register containing

32 D-Type master slave flip-flops. The data

present at the SHIFT RIGHT INPUT is

synchronously transferred into the first register

stage with the positive CLOCK edge, provided the

LEFT/RIGHT CONTROL is at a low level, the

RECIRCULATE CONTROL is at a high level, and

the CLOCK INHIBIT is low. If the LEFT/RIGHT

control and the RECIRCULATE CONTROL are

both at a high level, data at the SHIFT LEFT

INPUT is synchronously transferred into the 32nd

PIN CONNECTION

September 2002

1/11

12 3 4 5 6 7...11

中文翻译

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与HCF40100相关器件

型号	品牌	获取价格	描述	数据表
HCF40100B	STMICROELECTRONICS	获取价格	32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER
HCF40100BC1	STMICROELECTRONICS	获取价格	32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER
HCF40100BE	STMICROELECTRONICS	获取价格	IC,SHIFT REGISTER,CMOS,DIP,16PIN,PLASTIC
HCF40100BEY	STMICROELECTRONICS	获取价格	32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER
HCF40100BF	STMICROELECTRONICS	获取价格	HCF40100BF
HCF40100BM1	STMICROELECTRONICS	获取价格	32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER
HCF40100M013TR	STMICROELECTRONICS	获取价格	4000/14000/40000 SERIES, 32-BIT BIDIRECTIONAL SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OU
HCF40101	STMICROELECTRONICS	获取价格	9-BIT PARITY GENERATOR/CHECKER
HCF40101B	STMICROELECTRONICS	获取价格	9-BIT PARITY GENERATOR/CHECKER
HCF40101BC1	STMICROELECTRONICS	获取价格	9-BIT PARITY GENERATOR/CHECKER