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HCF40100BC1 PDF预览

HCF40100BC1

更新时间: 2024-11-03 22:56:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 移位寄存器触发器逻辑集成电路输出元件
页数 文件大小 规格书
13页 289K
描述
32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER

HCF40100BC1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QLCC
包装说明:PLASTIC, LCC-20针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.74Is Samacsys:N
其他特性:WRAP AROUND; CLOCK INHIBIT; OUTPUT CHANGES WITH THE FALLING EDGE OF SHIFT CLOCK计数方向:BIDIRECTIONAL
系列:4000/14000/40000JESD-30 代码:S-PQCC-J20
JESD-609代码:e3长度:8.9662 mm
负载电容(CL):50 pF逻辑集成电路类型:SERIAL IN SERIAL OUT
位数:32功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC20,.4SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):NOT SPECIFIED
电源:3/15 V传播延迟(tpd):720 ns
认证状态:Not Qualified座面最大高度:4.57 mm
子类别:Shift Registers最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:8.9662 mm
最小 fmax:1 MHzBase Number Matches:1

HCF40100BC1 数据手册

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HCC/HCF40100B  
32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER  
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FULLY STATIC OPERATION  
data in the 32nd stage is shifted into the first stage  
when the LEFT/RIGHT CONTROL is low and from  
the 1st stage to the 32nd stage when the  
LEFT/RIGHT CONTROL is high.  
SHIFT LEFT/SHIFT RIGHT CAPABILITY  
MULTIPLE PACKAGE CASCADING  
RECIRCULATE CAPABILITY  
LIFO OR FIFO CAPABILITY  
STANDARDIZED SYMMETRICAL OUTPUT  
CHARACTERISTICS  
QUIESCENT CURRENT SPECIFIED AT 20V  
FOR HCC DEVICE  
5V, 10V, AND 15V PARAMETRIC RATINGS  
INPUT CURRENT OF 100nA AT 18V AND 25°C  
FOR HCC DEVICE  
100% TESTED FOR QUIESCENT CURRENT  
MEETS ALLREQUIREMENTS OF JEDECTEN-  
TATIVE STANDARD No. 13A, ”STANDARD  
SPECIFICATIONS FOR DESCRIPTION OF ”B”  
SERIES CMOS DEVICES”  
.
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F
EY  
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(Ceramic Frit Seal Package)  
(Plastic Package)  
M1  
C1  
DESCRIPTION  
(Micro Package)  
(Plastic Chip Carrier)  
The HCC40100B (extended temperature range)  
and HCF40100B (intermediate temperature range)  
are monolithic integrated circuits, available in 16-  
lead dual in-line plastic or ceramic package and  
plastic micro package. The HCC/HCF40100B is a  
32-stage shift register containing 32 D-type master-  
slave flip-flops. The data present at the SHIFT-  
RIGHT INPUT is transferred into the first register  
stagesynchronously withthepositive CLOCK edge,  
provided the LEFT/RIGHT CONTROL is at a low  
level, the RECIRCULATE CONTROL is at a high  
level, and the CLOCK INHIBIT is low. If the  
LEFT/RIGHT CONTROL is at a high level and the  
RECIRCULATE CONTROL is also high, data at the  
SHIFT-LEFT INPUT istransferred into the 32nd reg-  
ister stage synchronously with the positive CLOCK  
transition, provided the CLOCK INHIBIT is low. The  
state of the LEFT/RIGHT CONTROL, RECIRCU-  
LATE CONTROL, and CLOCK INHIBIT should not  
be changed when theCLOCK ishigh. Dataisshifted  
one stage left or one stage right depending on the  
state of the LEFT/RIGHT CONTROL, synchron-  
ously with the positive CLOCK edge. Data clocked  
into the first or 32nd register states isavailable at the  
SHIFT-LEFT or SHIFT-RIGHT OUTPUT respec-  
tively, on the next negative CLOCK transition (see  
Data Transfer Table). No shifting occurs on the posi-  
tive CLOCK edge if the CLOCK INHIBIT line is at a  
high level. Withthe RECIRCULATE CONTROL low,  
ORDER CODES :  
HCC40100BF  
HCF40100BM1  
HCF40100BEY HCF40100BC1  
PIN CONNECTIONS  
June 1989  
1/13  

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