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HCF40103BM1 PDF预览

HCF40103BM1

更新时间: 2024-11-04 04:56:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 计数器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
14页 831K
描述
8-STAGE PRESETTABLE SYNCHRONOUS 8 BIT BINARY DOWN COUNTERS

HCF40103BM1 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SO-16针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.83Is Samacsys:N
计数方向:DOWNJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
负载电容(CL):50 pF负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:700000 Hz
工作模式:SYNCHRONOUS湿度敏感等级:3
位数:8功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TUBE峰值回流温度(摄氏度):260
电源:5/15 V传播延迟(tpd):600 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Counters最大供电电压 (Vsup):20 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:3.9 mm
最小 fmax:2.4 MHzBase Number Matches:1

HCF40103BM1 数据手册

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HCF40103B  
8-STAGE PRESETTABLE SYNCHRONOUS  
8 BIT BINARY DOWN COUNTERS  
SYNCHRONOUS OR ASYNCHRONOUS  
PRESET  
MEDIUM -SPEED OPERATION :  
f
=3.6MHz (Typ.) at V = 10V  
CL  
DD  
CASCADABLE  
QUIESCENT CURRENT SPECIF. UP TO 20V  
5V, 10V AND 15V PARAMETRIC RATINGS  
INPUT LEAKAGE CURRENT  
DIP  
SOP  
I = 100nA (MAX) AT V = 18V T = 25°C  
I
DD  
A
ORDER CODES  
PACKAGE  
100% TESTED FOR QUIESCENT CURRENT  
MEETS ALL REQUIREMENTS OF JEDEC  
JESD13B "STANDARD SPECIFICATIONS  
FOR DESCRIPTION OF B SERIES CMOS  
DEVICES"  
TUBE  
T & R  
DIP  
HCF40103BEY  
HCF40103BM1  
SOP  
HCF40103M013TR  
CE) input is high. The CARRY-OUT/ZERO  
DETECT (CO/ZD) output goes low when the  
count reaches zero if the CI/CE input is low, and  
remains low for one full clock period. When the  
SYNCHRONOUS PRESET ENABLE (SPE) input  
is low, data at the JAM input is clocked into the  
counter on the next positive clock transition  
regardless of the state of the CI/CE input. When  
the ASYNCHRONOUS PRESET ENABLE (APE)  
input is low, data at the JAM inputs is  
asynchronously forced into the counter regardless  
of the state of the SPE, CI/CE, or CLOCK inputs.  
JAM inputs J0-J7 represent a single 8 bit binary  
word. When the CLEAR (CLR) input is low, the  
counter is asynchronously cleared to its maximum  
DESCRIPTION  
HCF40103B is a monolithic integrated circuit  
fabricated in Metal Oxide Semiconductor  
technology available in DIP and SOP packages.  
HCF40103B consists of an 8-stage synchronous  
down counter with a single output that is active  
when the internal count is zero. This device  
contains a single 8-bit binary counter. It has  
control inputs for enabling or disabling the clock,  
for clearing the counter to its maximum count, and  
for presetting the counter either synchronously or  
asynchronously. All control inputs and the  
CARRY-OUT/ZERO  
DETECT  
output  
are  
active-low logics. In normal operation, the counter  
is decremented by one count on each positive  
transition of the CLOCK. Counting is inhibited  
when the CARRY-IN/COUNTER ENABLE (CI/  
count (255 ) regardless of the state of any other  
10  
input. The precedent relationship between control  
input is indicated in the truth table. If all control  
PIN CONNECTION  
September 2002  
1/14  

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