HCF40100B

更新时间： 2024-11-03 22:56:59

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		移位寄存器
页数	文件大小	规格书
13页	289K
描述
32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER

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中文翻译

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数据手册

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HCF40100B 数据手册

HCC/HCF40100B

32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER

FULLY STATIC OPERATION

data in the 32nd stage is shifted into the first stage

when the LEFT/RIGHT CONTROL is low and from

the 1st stage to the 32nd stage when the

LEFT/RIGHT CONTROL is high.

SHIFT LEFT/SHIFT RIGHT CAPABILITY

MULTIPLE PACKAGE CASCADING

RECIRCULATE CAPABILITY

LIFO OR FIFO CAPABILITY

STANDARDIZED SYMMETRICAL OUTPUT

CHARACTERISTICS

QUIESCENT CURRENT SPECIFIED AT 20V

FOR HCC DEVICE

5V, 10V, AND 15V PARAMETRIC RATINGS

INPUT CURRENT OF 100nA AT 18V AND 25°C

FOR HCC DEVICE

100% TESTED FOR QUIESCENT CURRENT

MEETS ALLREQUIREMENTS OF JEDECTEN-

TATIVE STANDARD N^o. 13A, ”STANDARD

SPECIFICATIONS FOR DESCRIPTION OF ”B”

SERIES CMOS DEVICES”

(Ceramic Frit Seal Package)

(Plastic Package)

DESCRIPTION

(Micro Package)

(Plastic Chip Carrier)

The HCC40100B (extended temperature range)

and HCF40100B (intermediate temperature range)

are monolithic integrated circuits, available in 16-

lead dual in-line plastic or ceramic package and

plastic micro package. The HCC/HCF40100B is a

32-stage shift register containing 32 D-type master-

slave flip-flops. The data present at the SHIFT-

RIGHT INPUT is transferred into the first register

stagesynchronously withthepositive CLOCK edge,

provided the LEFT/RIGHT CONTROL is at a low

level, the RECIRCULATE CONTROL is at a high

level, and the CLOCK INHIBIT is low. If the

LEFT/RIGHT CONTROL is at a high level and the

RECIRCULATE CONTROL is also high, data at the

SHIFT-LEFT INPUT istransferred into the 32nd reg-

ister stage synchronously with the positive CLOCK

transition, provided the CLOCK INHIBIT is low. The

state of the LEFT/RIGHT CONTROL, RECIRCU-

LATE CONTROL, and CLOCK INHIBIT should not

be changed when theCLOCK ishigh. Dataisshifted

one stage left or one stage right depending on the

state of the LEFT/RIGHT CONTROL, synchron-

ously with the positive CLOCK edge. Data clocked

into the first or 32nd register states isavailable at the

SHIFT-LEFT or SHIFT-RIGHT OUTPUT respec-

tively, on the next negative CLOCK transition (see

Data Transfer Table). No shifting occurs on the posi-

tive CLOCK edge if the CLOCK INHIBIT line is at a

high level. Withthe RECIRCULATE CONTROL low,

ORDER CODES :

HCC40100BF

HCF40100BM1

HCF40100BEY HCF40100BC1

PIN CONNECTIONS

June 1989

1/13

12 3 4 5 6 7...13

中文翻译

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与HCF40100B相关器件

型号	品牌	获取价格	描述	数据表
HCF40100BC1	STMICROELECTRONICS	获取价格	32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER
HCF40100BE	STMICROELECTRONICS	获取价格	IC,SHIFT REGISTER,CMOS,DIP,16PIN,PLASTIC
HCF40100BEY	STMICROELECTRONICS	获取价格	32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER
HCF40100BF	STMICROELECTRONICS	获取价格	HCF40100BF
HCF40100BM1	STMICROELECTRONICS	获取价格	32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER
HCF40100M013TR	STMICROELECTRONICS	获取价格	4000/14000/40000 SERIES, 32-BIT BIDIRECTIONAL SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OU
HCF40101	STMICROELECTRONICS	获取价格	9-BIT PARITY GENERATOR/CHECKER
HCF40101B	STMICROELECTRONICS	获取价格	9-BIT PARITY GENERATOR/CHECKER
HCF40101BC1	STMICROELECTRONICS	获取价格	9-BIT PARITY GENERATOR/CHECKER
HCF40101BE	STMICROELECTRONICS	获取价格	IC,PARITY GENERATOR/CHECKER,CMOS,DIP,14PIN,PLASTIC

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