10 Gbit/s
Transmitter MUX
with Re-timing
GD16555B
Preliminary
General Description
Features
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GD16555B is a 9.95328 Gbit/s transmit-
ter chip for use in SDH STM-64 and
SONET OC-192 optical communication
systems.
The output of the MUX stage is retimed
by the 10 GHz clock and the output
driver is a Current Mode Logic (CML)
output with internal 50 Ω termination re-
sistors.
On-chip low noise 10 GHz VCO with
a wide tuning range.
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Automated capture of the VCO
frequency by a true phase and
frequency detector.
GD16555B integrates all the main func-
tions of the transmitter, which is clock
generation, PLL circuits and multiplexer
in a single monolithic IC. Hence only an
external loop filter is required.
The 16 bit wide parallel input interface is
differential CML with 50 Ω internal load
termination, and with a 622 MHz clock
output mastering the timing at the STM-4
interface. The phase of the output clock
is selected in four phases: 0°, 90°, 180°,
and 270° by two select pins.
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Retiming of MUX stage output with
10 GHz clock.
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Clock failure detection NLDET.
The main functions of GD16555B are
shown in the figure below. The clock
generation is made on-chip by a low
noise and tuneable 10 GHz VCO. The
VCO centre frequency is controlled by a
PLL with an external loop filter, allowing
the user to control the loop characteristic.
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16:1 MUX with differential 622 Mbit/s
CML data input.
GD16555B is manufactured in a Silicon
Bipolar process.
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CML data input with 50 Ω internal
load termination.
GD16555B uses a single -5.2 V supply
voltage.
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622 MHz clock output for counter
clocking.
The clock synchronisation is controlled
by the Phase and Frequency Detector
with a 155 MHz or 622 MHz reference
clock input (package bonding option).
The power dissipation is 2 W, typical.
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Clock output is selectable in four
phases: 0°, 90°, 180°, or 270°.
GD16555B is delivered in a Multi Layer
Ceramic (MLC) package, with internal
high-speed 50 Ω transmission lines.
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GD16555B multiplexes a 16 bit parallel
622 Mbit/s interface into a serial
9.9553 Gbit/s data stream.
155 MHz or 622 MHz reference clock
input (package bonding option).
All high-speed signals is bonded with
GiGA’s proprietary Flexguide® Bonding
Technique.
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Single supply operation: -5.2 V
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Low Power dissipation: 2 W (typ.).
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Silicon Bipolar process.
DI0
DIN0
FF
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68 pin Multi Layer Ceramic (MLC)
package.
Flexguide
OUT
16:1
Parallel
Input Data
OUTN
Multiplexer
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DI15
DIN15
CKOUT
CKOUTN
Flexguide® Bonding Technique.
NLDET
Timing
Control
SEL1
SEL2
Phase
PCLT
POUT
Frequency
Applications
Detector
VCO
PHIGH
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VCTL
Telecommunication systems:
PLOW
–
–
SDH STM-64
SONET OC-192.
VCUR
(only /155 vers.)
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Fibre optic test equipment.
TCK
S
E
L
3
(*)
R
E
F
C
K
R
E
F
C
K
N
VDD VDDO VDDA VEE
(*) = Package Bonding Option
Submarime transmission systems.