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GD16561-32BA PDF预览

GD16561-32BA

更新时间： 2024-09-24 19:46:07
品牌 Logo 应用领域
英特尔 - INTEL /
页数 文件大小 规格书
7页 128K
描述
Interface Circuit, BIPolar, PQFP32, 5 X 5 MM, 1.40 MM HEIGHT, HEAT SINK, PLASTIC, TQFP-32

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中文翻译

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GD16561-32BA 技术参数

生命周期：Obsolete零件包装代码：QFP
包装说明：HLFQFP, QFP32,.28SQ,20针数：32
Reach Compliance Code：compliant风险等级：5.84
接口集成电路类型：INTERFACE CIRCUITJESD-30 代码：S-PQFP-G32
长度：5 mm标称负供电电压：-5.2 V
功能数量：1端子数量：32
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HLFQFP
封装等效代码：QFP32,.28SQ,20封装形状：SQUARE
封装形式：FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH电源：-5.2 V
认证状态：Not Qualified座面最大高度：1.6 mm
子类别：Display Drivers表面贴装：YES
技术：BIPOLAR温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD宽度：5 mm
Base Number Matches：1

GD16561-32BA 数据手册

 浏览型号GD16561-32BA的Datasheet PDF文件第2页浏览型号GD16561-32BA的Datasheet PDF文件第3页浏览型号GD16561-32BA的Datasheet PDF文件第4页浏览型号GD16561-32BA的Datasheet PDF文件第5页浏览型号GD16561-32BA的Datasheet PDF文件第6页浏览型号GD16561-32BA的Datasheet PDF文件第7页 
2.5 Gbit/s  
Retiming  
Laser Driver  
GD16561  
Preliminary  
General Description  
Features  
l
The GD16561 is a high performance low  
power 2.5 Gbit/s Laser Driver with  
optional on chip retiming of data.  
Retiming of the data signal connected to  
the pins DIN, DINQ is made by means of  
a DFF clocked by an external clock sig-  
nal at the data rate fed to the pins CKIN  
and CKINQ.  
Complies with ITU-T STM-16 and  
SONET OC-48 standards.  
l
Intended for driving a 50 Ω load,  
e.g. a laser diode with 50 Ω input  
impedance.  
The GD16561 is designed to meet and  
exceed ITU-T STM-16 or SONET OC-48  
fiberoptic communication systems re-  
quirements.  
A Mark-Space monitor is available on the  
pins MARKP and MARKN. Together with  
the symmetry adjustment pin (SYM) this  
may be used to control the mark space  
ratio of the output signal.  
l
Clocked or non-clocked operation.  
l
The GD16561 is designed to sink a  
Modulation Current into the IOUT pin and  
a Pre-Bias Current into the IPRE pin. The  
Modulation Current is adjustable up to  
60 mA by means of the pin VMOD. The  
Pre-Bias Current may be adjusted up to  
50 mA by means of the VPRE pin.  
Large modulation current adjustment  
range from 5 mA to 60 mA.  
l
The GD16561 is implemented in a Sili-  
con Bipolar process and requires a single  
+5 V supply or a single -5.2 V supply.  
Output voltage over / under shoot  
less than ±2 % respectively ± 5 %.  
l
Rise / fall times less than 100 ps.  
The circuit is available in a thermally  
enhanced 32-pin TQFP plastic package.  
l
Laser diode pre-bias adjustable up to  
50 mA.  
l
Mark-Space monitor.  
VADJEF VMOD VADJBUF  
VPRE  
l
Symmetry adjustment.  
l
Internal 50 Ω termination of data and  
clock inputs.  
Modulation  
Current  
Control  
Pre-Bias  
Current  
Control  
IPRE  
l
Operates up to 3.5 Gbit/s.  
VDD  
VDDR  
VDDCONT  
CKSEL  
l
Power dissipation: 0.38 W.  
Excluding Modulation Current and  
Pre-bias Current.  
Input  
Buffer  
Output  
Driver  
DIN  
IOUT  
D
Q
DINQ  
IOUTN  
l
Silicon Bipolar process.  
50  
50  
VEE  
VEEP  
VEEB  
VEER  
DINT  
l
32 pin thermally enhanced TQFP  
plastic package.  
Mark/Space  
Monitor  
Input  
Buffer  
CKIN  
MARKP  
MARKN  
SYM  
CKINQ  
50  
50  
Applications  
CKINT  
l
Tele Communication:  
–
–
SDH STM-16  
SONET OC-48  
l
l
l
Datacom up to 3.125 Gbit/s.  
Electro Absorption laser driver.  
Direct Modulation laser driver.  
1234567

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