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FQB4N20L PDF预览

FQB4N20L

更新时间: 2024-11-23 22:25:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 519K
描述
200V LOGIC N-Channel MOSFET

FQB4N20L 数据手册

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December 2000  
TM  
QFET  
FQB4N20L / FQI4N20L  
200V LOGIC N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
3.8A, 200V, R  
= 1.35@V = 10 V  
DS(on) GS  
Low gate charge ( typical 4.0 nC)  
Low Crss ( typical 6.0 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
This advanced technology is especially tailored to minimize  
on-state  
resistance,  
provide  
superior  
switching  
performance, and withstand high energy pulse in the  
avalanche and commutation modes. These devices are  
well suited for high efficiency switching DC/DC converters,  
switch mode power supplies, and motor control.  
Low level gate drive requirement allowing direct  
operation from logic drivers  
D
!
D
"
! "  
"
!
G
"
G
S
D2-PAK  
FQB Series  
I2-PAK  
FQI Series  
G
D
S
!
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB4N20L / FQI4N20L  
Units  
V
V
I
Drain-Source Voltage  
200  
3.8  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
2.4  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
15.2  
± 20  
52  
A
DM  
V
E
I
Gate-Source Voltage  
V
GSS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
AS  
3.8  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
4.5  
mJ  
V/ns  
W
AR  
dv/dt  
5.5  
Power Dissipation (T = 25°C) *  
3.13  
45  
P
A
D
Power Dissipation (T = 25°C)  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
0.36  
-55 to +150  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
1/8” from case for 5 seconds  
T
300  
°C  
L
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
2.78  
40  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  

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