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FDS6894

更新时间: 2024-11-23 22:49:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
5页 83K
描述
Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET

FDS6894 数据手册

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October 2001  
FDS6894A  
Dual N-Channel Logic Level PWM Optimized PowerTrenchÒ MOSFET  
General Description  
Features  
These N-Channel Logic Level MOSFETs are produced  
·
8 A, 20 V.  
RDS(ON) = 17 mW @ VGS = 4.5 V  
RDS(ON) = 20 mW @ VGS = 2.5 V  
RDS(ON) = 30 mW @ VGS = 1.8 V  
using  
Fairchild  
Semiconductor’s  
advanced  
PowerTrench process that has been especially tailored  
to minimize the on-state resistance and yet maintain  
superior switching performance.  
·
·
Low gate charge (17 nC)  
These devices are well suited for low voltage and  
battery powered applications where low in-line power  
loss and fast switching are required.  
High performance trench technology for extremely  
low RDS(ON)  
·
High power and current handling capability  
D1  
5
6
7
8
4
3
2
1
D1  
D2  
Q1  
Q2  
D2  
G1  
SO-8  
S1  
G2  
S2  
Pin 1  
Absolute Maximum Ratings TA=25oC unless otherwise noted  
Symbol  
VDSS  
Parameter  
Drain-Source Voltage  
Ratings  
Units  
20  
V
V
A
VGSS  
Gate-Source Voltage  
± 8  
ID  
Drain Current – Continuous  
– Pulsed  
(Note 1a)  
8
32  
PD  
W
Power Dissipation for Dual Operation  
Power Dissipation for Single Operation  
2
(Note 1a)  
(Note 1b)  
1.6  
1
0.9  
(Note 1c)  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
–55 to +150  
°C  
Thermal Characteristics  
RqJA  
Thermal Resistance, Junction-to-Ambient  
(Note 1a)  
(Note 1)  
78  
40  
°C/W  
°C/W  
RqJC  
Thermal Resistance, Junction-to-Case  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
FDS6894A  
FDS6894A  
13’’  
12mm  
2500 units  
FDS6894A Rev C (W)  
Ó2001 Fairchild Semiconductor Corporation  

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