5秒后页面跳转
DSP56004ROM PDF预览

DSP56004ROM

更新时间: 2024-11-02 03:02:15
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 数字信号处理器
页数 文件大小 规格书
82页 617K
描述
SYMPHONY AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS

DSP56004ROM 数据手册

 浏览型号DSP56004ROM的Datasheet PDF文件第2页浏览型号DSP56004ROM的Datasheet PDF文件第3页浏览型号DSP56004ROM的Datasheet PDF文件第4页浏览型号DSP56004ROM的Datasheet PDF文件第5页浏览型号DSP56004ROM的Datasheet PDF文件第6页浏览型号DSP56004ROM的Datasheet PDF文件第7页 
Freescale Semiconductor, Inc.  
SEMICONDUCTOR TECHNICAL DATA  
Order this document by:  
DSP56004/D, Rev. 3  
DSP56004  
DSP56004ROM  
SYMPHONYAUDIO DSP FAMILY  
24-BIT DIGITAL SIGNAL PROCESSORS  
Motorola designed the Symphony™ family of high-performance, programmable Digital Signal  
Processors (DSPs) to support a variety of digital audio applications, including Dolby ProLogic,  
ATRAC, and Lucasfilm Home THX processing. Software for these applications is licensed by  
Motorola for integration into products like audio/ video receivers, televisions, and automotive  
sound systems with such user-developed features as digital equalization and sound field  
processing. The DSP56004 is an MPU-style general purpose DSP, composed of an efficient 24-bit  
Digital Signal Processor core, program and data memories, various peripherals optimized for  
audio, and support circuitry. As illustrated in Figure 1, the DSP56000 core family compatible  
DSP is fed by program memory, two independent data RAMs and two data ROMs, a Serial  
Audio Interface (SAI), Serial Host Interface (SHI), External Memory Interface (EMI), dedicated  
I/ O lines, on-chip Phase Lock Loop (PLL), and On-Chip Emulation (OnCE ) port.  
16-Bit Bus  
24-Bit Bus  
4
9
5
29  
General  
Purpose  
Input/  
Serial  
Audio  
Interface  
(SAI)  
Serial  
External  
X Data  
Memory*  
Program  
Memory*  
Y Data  
Memory*  
Host  
Interface  
(SHI)  
Memory  
Interface  
(EMI)  
Output  
PAB  
24-Bit  
DSP56000  
Core  
Address  
Generation  
Unit  
XAB  
YAB  
GDB  
PDB  
XDB  
YDB  
Internal  
Data  
Bus  
Switch  
TM  
OnCE Port  
Program  
Decode  
Program  
Data ALU  
24 × 24 + 56 56-bit MAC  
Two 56-Bit Accumulators  
Interrupt  
Control  
Address  
Controller  
Generator  
Clock  
PLL  
Gen.  
Program Control Unit  
4
*Refer to Table 1 for memory configurations.  
3
4
IRQA, IRQB, NMI, RESET  
AA0248  
Figure 1 DSP56004 Block Diagram  
©1996, 1997 MOTOROLA, INC.  
For More Information On This Product,  
Go to: www.freescale.com  
 

与DSP56004ROM相关器件

型号 品牌 获取价格 描述 数据表
DSP56004UM ETC

获取价格

DSP56004 24-Bit Digital Signal Processor User
DSP56004UM/AD FREESCALE

获取价格

SYMPHONY AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS
DSP56005DS ETC

获取价格

DSP56005 24-Bit Digital Signal Processor Datasheet
DSP56005UM ETC

获取价格

DSP56005 24-Bit Digital Signal Processor User
DSP56007DS ETC

获取价格

DSP56007 24-Bit Digital Signal Processor Data Sheet
DSP56007ROM MOTOROLA

获取价格

Digital Signal Processor, 66MHz, HCMOS, PQFP80, 14 X 14 MM X 2.45 MM, 0.65 MM PITCH, PLAST
DSP56007UM ETC

获取价格

DSP56007 24-Bit Digital Signal Processor User
DSP56009DS ETC

获取价格

DSP56009 24-Bit Digital Signal Processor Datasheet
DSP56009EVMUM ETC

获取价格

DSP56009EVM User's Manual
DSP56009UM ETC

获取价格

DSP56009 24-Bit Digital Signal Processor User