Freescale Semiconductor, Inc.
MOTOROLA
Semiconductor Technical Data
DSP56012/D
Rev. 0, 09/98
Advance Information
DSP56012 24-Bit DVD Digital Signal Processor
The DSP56012 is a high-performance programmable digital signal processor (DSP) developed for
digital versatile disc (DVD), high-definition television (HDTV), and advanced set-top audio
decoding. The DSP56012 is optimized with audio-specific peripherals and customized memory
configuration, and may be programmed with Motorola’s certified software for Dolby AC-3 5.1
Channel Surround, Dolby Pro Logic, and MPEG1 Layer 2. These applications use Motorola’s 24-
bit DSP56000 architecture and are the highest quality solutions available. Flexible peripheral
modules and interface software allow simple connection to a wide variety of video/system
decoders. In addition, the DSP56012 offers switchable memory space configuration, a large user-
definable program ROM and two independent data RAMs and ROMs, a serial audio interface
(SAI), a serial host interface (SHI), a parallel host interface (HI) with Direct Memory Access
(DMA) for communicating with other processors, dedicated I/O lines, an on-chip phase-locked
™
loop (PLL), an On-Chip Emulation (OnCE ) port, and an on-chip digital audio transmitter
(DAX). Figure 1-1 shows the functional blocks of the DSP56012.
16-Bit Bus
24-Bit Bus
8
5
2
9
15
Parallel
Host
Interface
(HI)
General
Purpose
I/O
Serial
Serial
Host
Digital
Audio
X Data
Memory
Program
Memory
Y Data
Memory
Audio
Interface
(SAI)
Interface Transmitter
(SHI) (DAX)
(GPIO)
Expansion
Area
PAB
XAB
YAB
24-Bit
DSP56000
Core
Address
Generation
Unit
GDB
Internal
Data
Bus
PDB
XDB
YDB
Switch
TM
OnCE Port
Data ALU
24 ¥ 24 + 56 Æ 56-Bit MAC
Two 56-Bit Accumulators
Program
Interrupt
Controller
Program
Decode
Program
Address
Clock
Controller
Generator
PLL
Gen.
Program Control Unit
4
4
3
EXTAL
AA1271
IRQA, IRQB, NMI, RESET
Figure 1-1. DSP56012 Block Diagram
© Motorola, Inc., 1998
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