Datasheet > DSP56156

DSP56156

更新时间： 2024-11-23 22:40:39

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		数字信号处理器
页数	文件大小	规格书
76页	1020K
描述
16-bit Digital Signal Processor

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DSP56156 数据手册

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REV 1

Freescale Semiconductor, Inc.

MOTOROLA

SEMICONDUCTOR

TECHNICAL DATA

DSP56156

DSP56156ROM

Advance Information

16-bit Digital Signal Processor

The DSP56156 is a general-purpose MPU-style Digital Signal Processor (DSP). On a single semi-

conductor chip, the DSP56156 comprises a very efficient 16-bit digital signal processing core, pro-

gram and data memories, a number of peripherals, and system support circuitry. Unique features

of the DSP56156 include a built-in sigma-delta (²ý) codec and phase-locked loop (PLL). This com-

bination of features makes the DSP56156 a cost-effective, high-performance solution for many DSP

applications, especially speech coding, digital communications, and cellular base stations.

The central processing unit of the DSP56156 is the DSP56100 core processor. Like all DSP56100-

based DSPs, the DSP56156 consists of three execution units operating in parallel, allowing up to

six operations to be performed during each instruction cycle. This parallelism greatly increases the

effective processing speed of the DSP56156. The MPU-style programming model and instruction

set allow straightforward generation of efficient, compact code. The basic architectures and devel-

opment tools of Motorola's 16-bit, 24-bit, and 32-bit DSPs are so similar that understanding how to

design and program one greatly reduces the time needed to learn the others.

On-Chip Emulation (OnCE^TMport) circuitry provides convenient and inexpensive debug facil-

ities normally available only through expensive external hardware. Development costs are re-

duced and in-field testing is greatly simplified using the OnCE^TMport. Figure 1 illustrates the

DSP56156 in detail.

16-bit Bus

Sigma-

Delta

16-bit

Sync.

Host

Program

Data

Timer/

Event

Serial

(SSI)

or I/O

Serial Interface

Memory *

Memory

Codec

(SSI)

(HI)

2048 × 16 RAM 2048 × 16 RAM

Counter

or I/O

64 × 16 ROM

(boot)

External

Address

Bus

PAB

16-bit

Address

XAB1

XAB2

Generation

Unit

56100 DSP

Core

Switch

GDB

PDB

XDB

Internal

Data

External

Data

Bus

Switch

OnCE™ Port

Clock

Control

Program

Decode

Program

Data ALU

16 x 16 + 40 —> 40-bit MAC

Two 40-bit Accumulators

Interrupt

Control

Bus

Address

Controller

Generator

Control

PLL

Gen.

Program Control Unit

IRQ

* 12 k x 16 ROM replaces the program RAM on the DSP56156ROM

Figure 1 DSP56156 Block Diagram

Specifications and information herein are subject to change without notice.

OnCE is a trademark of Motorola, Inc.

MOTOROLA INC., 1994

For More Information On This Product,

Go to: www.freescale.com

12 3 4 5 6 7...76

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与DSP56156相关器件

型号	品牌	获取价格	描述	数据表
DSP56156FE40	MOTOROLA	获取价格	16-bit Digital Signal Processor
DSP56156FE60	MOTOROLA	获取价格	16-bit Digital Signal Processor
DSP56156FV40	MOTOROLA	获取价格	16-bit Digital Signal Processor
DSP56156FV60	MOTOROLA	获取价格	16-bit Digital Signal Processor
DSP56156MFE33	ETC	获取价格	16-Bit Digital Signal Processor
DSP56156MFE40	ETC	获取价格	16-Bit Digital Signal Processor
DSP56156MFE50	ETC	获取价格	16-Bit Digital Signal Processor
DSP56156ROM	MOTOROLA	获取价格	16-bit Digital Signal Processor
DSP56156ROMFE60	MOTOROLA	获取价格	Digital Signal Processor, 16-Ext Bit, 60MHz, HCMOS, CQFP112, 20 X 20 MM, 3 MM HEIGHT, CERA
DSP56156ROMFV40	MOTOROLA	获取价格	16-BIT, 40MHz, OTHER DSP, PQFP112, 20 X 20 MM, 1.50 MM HEIGHT, PLASTIC, TQFP-112

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