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DSP56011DS

更新时间: 2024-11-01 23:49:15
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其他 - ETC 数字信号处理器DVD
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描述
DSP56011 24-Bit DVD Digital Signal Processor Datasheet

DSP56011DS 数据手册

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Freescale Semiconductor, Inc.  
MOTOROLA  
Order this document by:  
DSP56011/D  
SEMICONDUCTOR TECHNICAL DATA  
DSP56011  
Advance Information  
24-BIT DVD DIGITAL SIGNAL PROCESSOR  
The DSP56011 is a high-performance programmable Digital Signal Processor (DSP) developed  
for Digital Versatile Disc (DVD), High-Definition Television (HDTV), and Advanced Set-top  
audio decoding. The DSP56011 is optimized with audio-specific peripherals and customized  
memory configuration, and may be programmed with Motorolas certified software for Dolby  
AC-3 5.1 Channel Surround, Dolby Pro Logic, and MPEG1 Layer 2. These applications use  
Motorolas 24-bit DSP56000 architecture and are the highest quality solutions available. Flexible  
peripheral modules and interface software allow simple connection to a wide variety of video/  
system decoders. In addition, the DSP56011 offers switchable memory space configuration, a  
large user-definable Program ROM and two independent data RAMs and ROMs, a Serial Audio  
Interface (SAI), Serial Host Interface (SHI), Parallel Host Interface (HI) with Direct Memory  
Access (DMA) for communicating with other processors, dedicated I/ O lines, on-chip Phase  
Lock Loop (PLL), On-Chip Emulation (OnCE ) port, and on-chip Digital Audio Transmitter  
(DAX). Figure 1 shows the functional blocks of the DSP56011.  
16-Bit Bus  
24-Bit Bus  
8
5
2
9
15  
Parallel  
Host  
Interface  
(HI)  
General  
Purpose  
I/O  
Serial  
Serial  
Host  
Digital  
Audio  
X Data  
Memory  
Program  
Memory  
Y Data  
Memory  
Audio  
Interface  
(SAI)  
Interface Transmitter  
(SHI) (DAX)  
(GPIO)  
Expansion  
Area  
PAB  
24-Bit  
DSP56000  
Core  
Address  
Generation  
Unit  
XAB  
YAB  
GDB  
Internal  
Data  
Bus  
PDB  
XDB  
YDB  
Switch  
OnCETM Port  
Program  
Program  
Decode  
Program  
Address  
Generator  
Data ALU  
24 × 24 + 56 56-Bit MAC  
Two 56-Bit Accumulators  
Interrupt  
Clock  
Controller  
Controller  
PLL  
Gen.  
Program Control Unit  
4
4
3
EXTAL  
AA1271  
IRQA, IRQB, NMI, RESET  
Figure 1 DSP56011 Block Diagram  
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
Preliminary Information  
Rev. 1  
© MOTOROLA, INC. 1996, 1997  
For More Information On This Product,  
Go to: www.freescale.com  
 

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