Datasheet > DS26502L

DS26502L

更新时间： 2024-11-05 04:15:11

品牌	Logo	应用领域
达拉斯 - DALLAS		电信集成电路 PC
页数	文件大小	规格书
125页	1095K
描述
T1/E1/J1/64KCC BITS Element

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DS26502L 数据手册

DS26502

T1/E1/J1/64KCC BITS Element

www.maxim-ic.com

GENERAL DESCRIPTION

FEATURES

The DS26502 is a building-integrated timing- ꢀ G.703 2048kHz Synchronization Interface

supply (BITS) clock-recovery element. It also Compliant

functions as a basic T1/E1 transceiver. The ꢀ G.703 64kHz Centralized (Option A) and

receiver portion can recover a clock from T1, Codirectional Timing Interface Compliant

E1, 64kHz composite clock (64KCC), and ꢀ G.703 Appendix II 64kHz and 6312kHz

6312kHz synchronization timing interfaces. In

T1 and E1 modes, the Synchronization Status

Japanese Synchronization Interface

Compliant

Message (SSM) can also be recovered. The ꢀ Interfaces to Standard T1/J1 (1.544MHz) and

transmit portion can directly interface to T1, E1, E1 (2.048MHz)

or 64KCC synchronization interfaces as well as ꢀ Interface to CMI-Coded T1/J1 and E1

source the SSM in T1 and E1 modes. The ꢀ Short- and Long-Haul Line Interface

DS26502 can translate between any of the ꢀ Transmit and Receive T1 and E1 SSM

supported inbound synchronization clock rates to

Messages with Message Validation

any supported outbound rate. A separate output ꢀ T1/E1 Jitter Attenuator with Bypass Mode

is provided to source a 6312kHz clock. The ꢀ Fully Independent Transmit and Receive

device is controlled through a parallel, serial, or

hardware controller port.

Functionality

ꢀ

Internal Software-Selectable Receive- and

Transmit-Side Termination for

75Ω/100Ω/110Ω/120Ω T1, E1, and

Composite Clock Interfaces

Monitor Mode for Bridging Applications

Accepts 16.384MHz, 12.8MHz, 8.192MHz,

4.096MHz, 2.048MHz, or 1.544MHz Master

Clock

APPLICATIONS

BITS Timing

Rate Conversion

ꢀ

64kHz, 8kHz, and 400Hz Outputs in

Composite Clock Mode

8-Bit Parallel Control Port, Multiplexed or

Nonmultiplexed, Intel or Motorola

Serial (SPI) Control Port

ORDERING INFORMATION

PART

TEMP RANGE PIN-PACKAGE

0°C to +70°C 64 LQFP

DS26502L

ꢀ

DS26502LN -40°C to +85°C 64 LQFP

Hardware Control Mode

Provides LOS, AIS, and LOF Indications

Through Hardware Output Pins

Fast Transmitter-Output Disable Through

Device Pin for Protection Switching

IEEE 1149.1 JTAG Boundary Scan

3.3V Supply with 5V Tolerant Inputs and

Outputs

ꢀ

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device

may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.

1 of 125

REV: 053107

12 3 4 5 6 7...125

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与DS26502L相关器件

型号	品牌	获取价格	描述	数据表
DS26502LN	MAXIM	获取价格	T1/E1/J1/64KCC BITS Element
DS26502LN	DALLAS	获取价格	T1/E1/J1/64KCC BITS Element
DS26502LN+	MAXIM	获取价格	Framer, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64
DS26502LN+T	MAXIM	获取价格	Framer, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64
DS26503	DALLAS	获取价格	T1/E1/J1 BITS Element
DS26503	MAXIM	获取价格	T1/E1/J1/64KCC BITS Element
DS26503	ADI	获取价格	T1/E1/J1 BITS单元
DS26503_07	MAXIM	获取价格	T1/E1/J1 BITS Element
DS26503L	DALLAS	获取价格	T1/E1/J1 BITS Element
DS26503L	MAXIM	获取价格	T1/E1/J1 BITS Element

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