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DS26502LN+T

更新时间： 2024-11-26 21:13:15
品牌 Logo 应用领域
美信 - MAXIM 电信电信集成电路
页数 文件大小 规格书
125页 3160K
描述
Framer, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64

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DS26502LN+T 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：10 X 10 MM, 1.40 MM HEIGHT, LQFP-64Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.76
JESD-30 代码：S-PQFP-G64长度：10 mm
功能数量：1端子数量：64
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：1.6 mm
标称供电电压：3.3 V表面贴装：YES
电信集成电路类型：FRAMER温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：10 mmBase Number Matches：1

DS26502LN+T 数据手册

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DESIGN KIT AVAILABLE  
DS26502  
T1/E1/J1/64KCC BITS Element  
www.maxim-ic.com  
GENERAL DESCRIPTION  
FEATURES  
The DS26502 is a building-integrated timing- ꢀ G.703 2048kHz Synchronization Interface  
supply (BITS) clock-recovery element. It also Compliant  
functions as a basic T1/E1 transceiver. The ꢀ G.703 64kHz Centralized (Option A) and  
receiver portion can recover a clock from T1, Codirectional Timing Interface Compliant  
E1, 64kHz composite clock (64KCC), and ꢀ G.703 Appendix II 64kHz and 6312kHz  
6312kHz synchronization timing interfaces. In  
T1 and E1 modes, the Synchronization Status  
Japanese Synchronization Interface  
Compliant  
Message (SSM) can also be recovered. The ꢀ Interfaces to Standard T1/J1 (1.544MHz) and  
transmit portion can directly interface to T1, E1, E1 (2.048MHz)  
or 64KCC synchronization interfaces as well as ꢀ Interface to CMI-Coded T1/J1 and E1  
source the SSM in T1 and E1 modes. The ꢀ Short- and Long-Haul Line Interface  
DS26502 can translate between any of the ꢀ Transmit and Receive T1 and E1 SSM  
supported inbound synchronization clock rates to  
Messages with Message Validation  
any supported outbound rate. A separate output ꢀ T1/E1 Jitter Attenuator with Bypass Mode  
is provided to source a 6312kHz clock. The ꢀ Fully Independent Transmit and Receive  
device is controlled through a parallel, serial, or  
hardware controller port.  
Functionality  
ꢀ
Internal Software-Selectable Receive- and  
Transmit-Side Termination for  
75Ω/100Ω/110Ω/120Ω T1, E1, and  
Composite Clock Interfaces  
Monitor Mode for Bridging Applications  
Accepts 16.384MHz, 12.8MHz, 8.192MHz,  
4.096MHz, 2.048MHz, or 1.544MHz Master  
Clock  
APPLICATIONS  
BITS Timing  
Rate Conversion  
ꢀ
ꢀ
ꢀ
ꢀ
64kHz, 8kHz, and 400Hz Outputs in  
Composite Clock Mode  
8-Bit Parallel Control Port, Multiplexed or  
Nonmultiplexed, Intel or Motorola  
Serial (SPI) Control Port  
ORDERING INFORMATION  
PART  
TEMP RANGE PIN-PACKAGE  
0°C to +70°C 64 LQFP  
DS26502L  
ꢀ
ꢀ
ꢀ
DS26502LN -40°C to +85°C 64 LQFP  
Hardware Contr-ol Mode  
Provides LOS, AIS, and LOF Indications  
Through Hardware Output Pins  
Fast Transmitter-Output Disable Through  
Device Pin for Protection Switching  
IEEE 1149.1 JTAG Boundary Scan  
3.3V Supply with 5V Tolerant Inputs and  
Outputs  
ꢀ
ꢀ
ꢀ
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device  
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.  
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 		Framer, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64

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