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DS1021-25 PDF预览

DS1021-25

更新时间: 2024-09-17 22:34:07
品牌 Logo 应用领域
达拉斯 - DALLAS 延迟线
页数 文件大小 规格书
9页 196K
描述
Programmable 8-Bit Silicon Delay Line

DS1021-25 数据手册

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DS1021  
Programmable 8-Bit  
Silicon Delay Line  
www.dalsemi.com  
FEATURES  
PIN ASSIGNMENT  
All-silicon time delay  
IN  
E
1
2
3
4
5
6
7
8
16  
15  
14  
VCC  
OUT  
Models with 0.25 ns and 0.5 ns steps  
Programmable using 3-wire serial port or 8-  
bit parallel port  
Q/PO  
P1  
S
P7  
P6  
C
13  
12  
11  
10  
Leading and trailing edge accuracy  
Economical  
P2  
P3  
P5  
P4  
Auto-insertable, low profile, 16-pin SOIC  
package  
GND  
9
D
DS1021S 16-Pin SOIC (300-mil)  
See Mech. Drawings Section  
Low-power CMOS  
TTL/CMOS-compatible  
Vapor phase, IR and wave solderable  
PIN DESCRIPTION  
IN  
- Delay Input  
P0-P7  
GND  
OUT  
VCC  
S
- Parallel Program Pins  
- Ground  
- Delay Output  
- +5 Volts  
- Mode Select  
- Enable  
E
C
- Serial Port Clock  
- Serial Data Output  
- Serial Data Input  
Q
D
DESCRIPTION  
The DS1021 Programmable 8-Bit Silicon Delay Line consists of an 8-bit, user-programmable CMOS  
silicon integrated circuit. Delay values, programmed using either the 3-wire serial port or the 8-bit  
parallel port, can be varied over 256 equal steps. The faster model (-25) offers a maximum delay of 73.75  
ns with an incremental delay of 0.25 ns, while the slower model (-50) has a maximum delay of 137.5 ns  
with an incremental delay of 0.5 ns. Both models have an inherent (step zero) delay of 10 ns. After the  
user-determined delay, the input logic state is reproduced at the output without inversion. The DS1021 is  
TTL- and CMOS-compatible, capable of driving 10 74LS-type loads, and features both rising and falling  
edge accuracy.  
The all-CMOS DS1021 integrated circuit has been designed as a reliable, economic alternative to hybrid  
programmable delay lines. It is offered in a space-saving surface mount 16-pin SOIC.  
1 of 9  
111799  

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