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DAC5674IPHPR PDF预览

DAC5674IPHPR

更新时间: 2024-09-13 12:55:15
品牌 Logo 应用领域
德州仪器 - TI 转换器数模转换器
页数 文件大小 规格书
39页 1314K
描述
14-BIT, 40 MSPS, 2x/4x INTERPOLATING CommsDAC DIGITAL-TO-ANALOG CONVERTER

DAC5674IPHPR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:HTFQFP, TQFP48,.35SQ针数:48
Reach Compliance Code:compliantFactory Lead Time:1 week
风险等级:5.32Is Samacsys:N
最大模拟输出电压:1.25 V最小模拟输出电压:-1 V
转换器类型:D/A CONVERTER输入位码:BINARY, OFFSET BINARY
输入格式:PARALLEL, WORDJESD-30 代码:S-PQFP-G48
JESD-609代码:e4长度:7 mm
最大线性误差 (EL):0.0214%湿度敏感等级:3
位数:14功能数量:1
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HTFQFP封装等效代码:TQFP48,.35SQ
封装形状:SQUARE封装形式:FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:1.8,3.3 V
认证状态:Not Qualified采样速率:400 MHz
座面最大高度:1.2 mm标称安定时间 (tstl):0.02 µs
子类别:Other Converters最大压摆率:55 mA
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7 mm
Base Number Matches:1

DAC5674IPHPR 数据手册

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www.ti.com  
ꢀ ꢁꢂ ꢃꢄ ꢅꢆ  
SLWS148A − SEPTEMBER 2003 − REVISED OCTOBER 2005  
8
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y
ꢀ ꢊꢘ ꢊꢋꢁ ꢗ ꢈ ꢋ ꢖ ꢈ ꢁꢓ ꢁꢗꢖ ꢘ ꢂꢖ ꢓ ꢜꢔ ꢕꢋꢔ ꢕ  
  
D
Differential Scalable Current Outputs: 2 mA to  
20 mA  
FEATURES  
D
D
D
200-MSPS Maximum Input Data Rate  
400-MSPS Maximum Update Rate DAC  
D
On-Chip 1.2-V Reference  
D
1.8-V Digital and 3.3-V Analog Supply  
Operation  
76-dBc SFDR Over Full First Nyquist Zone  
With Single Tone Input Signal (F = 21 MHz)  
D
D
D
1.8/3.3-V CMOS Compatible Interface  
Power Dissipation: 435 mW at 400 MSPS  
Package: 48-Pin TQFP  
out  
D
D
D
74-dBc ACPR W-CDMA at 15.36 MHz IF  
69-dBc ACPR W-CDMA at 30.72 MHz IF  
Selectable 2y or 4y Interpolation Filter  
− Linear Phase  
− 0.05-dB Pass-Band Ripple  
− 80-dB Stop-Band Attenuation  
APPLICATIONS  
D
Cellular Base Transceiver Station Transmit  
Channel  
− CDMA: W-CDMA, CDMA2000, IS-95  
− TDMA: GSM, IS-136, EDGE/UWC-136  
− Stop-Band Transition 0.4−0.6 F  
data  
− Interpolation Filters Configurable in Either  
Low-Pass or High-Pass Mode, Allows For  
Selection High-Order Images  
D
Test and Measurement: Arbitrary Waveform  
Generation  
D
D
Direct Digital Synthesis (DDS)  
D
On-Chip 2y /4y PLL Clock Multiplier, PLL  
Bypass Mode  
Cable Modem Termination System  
DESCRIPTION  
The DAC5674 is a 14-bit resolution, high-speed, digital-to-analog converter (DAC) with integrated  
4× interpolation filter, onboard clock multiplier, and on-chip voltage reference. The device has been designed  
for high-speed digital data transmission in wired and wireless communication systems, high-frequency  
direct-digital synthesis (DDS) and waveform reconstruction in test and measurement applications.  
The 4× interpolation filter is implemented as a cascade of two 2× interpolation filters, each of which can be  
configured for either low-pass or high-pass response. This enables the user to select one of the higher order  
images present at multiples of the input data rate clock while maintaining a low date input rate. The resulting  
high IF output frequency allows the user to omit the conventional first mixer in heterodyne transmitter  
architectures and directly up-convert to RF using only one mixer, thereby reducing system complexity and  
costs.  
In 4× interpolation low-pass response mode, the DACs excellent spurious free dynamic range (SFDR) at  
intermediate frequencies located in the first Nyquist zone (up to 40 MHz) allows for multicarrier transmission  
in cellular base transceiver stations (BTS). The low-pass interpolation mode thereby relaxes image filter  
requirements by filtering out the images in the adjacent Nyquist zones.  
The DAC5674 PLL clock multiplier controls all internal clocks for the digital filters and DAC core. The differential  
clock input and internal clock circuitry provides for optimum jitter performance. Sine wave clock input signal is  
supported. The PLL can be bypassed by an external clock running at the DAC core update rate. The clock  
divider of the PLL ensures that the digital filters operate at the correct clock frequencies.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Excel is a trademark of Microsoft Corporation.  
CommsDAC and PowerPAD are trademarks of Texas Instruments.  
All other trademarks are the property of their respective owners.  
ꢐꢕ ꢖ ꢀꢝ ꢂ ꢋꢊ ꢖꢓ ꢀ ꢁꢋꢁ ꢞꢟ ꢠꢙ ꢡ ꢚꢢ ꢣꢞꢙꢟ ꢞꢛ ꢤꢥ ꢡ ꢡ ꢦꢟꢣ ꢢꢛ ꢙꢠ ꢧꢥꢨ ꢩꢞꢤ ꢢꢣꢞ ꢙꢟ ꢪꢢ ꢣꢦꢫ ꢐꢡ ꢙꢪꢥ ꢤꢣꢛ  
ꢤ ꢙꢟ ꢠꢙꢡ ꢚ ꢣꢙ ꢛ ꢧꢦ ꢤ ꢞ ꢠꢞ ꢤ ꢢ ꢣꢞ ꢙꢟꢛ ꢧ ꢦꢡ ꢣꢬꢦ ꢣꢦ ꢡ ꢚꢛ ꢙꢠ ꢋꢦꢭ ꢢꢛ ꢊꢟꢛ ꢣꢡ ꢥꢚ ꢦꢟꢣ ꢛ ꢛꢣ ꢢꢟꢪ ꢢꢡ ꢪ ꢮ ꢢꢡ ꢡ ꢢ ꢟꢣꢯꢫ  
ꢐꢡ ꢙ ꢪꢥꢤ ꢣ ꢞꢙ ꢟ ꢧꢡ ꢙ ꢤ ꢦ ꢛ ꢛ ꢞꢟ ꢰ ꢪꢙ ꢦ ꢛ ꢟꢙꢣ ꢟꢦ ꢤꢦ ꢛꢛ ꢢꢡ ꢞꢩ ꢯ ꢞꢟꢤ ꢩꢥꢪ ꢦ ꢣꢦ ꢛꢣꢞ ꢟꢰ ꢙꢠ ꢢꢩ ꢩ ꢧꢢ ꢡ ꢢꢚ ꢦꢣꢦ ꢡ ꢛꢫ  
Copyright 2005, Texas Instruments Incorporated  

DAC5674IPHPR 替代型号

型号 品牌 替代类型 描述 数据表
DAC5674IPHPRG4 TI

完全替代

14-BIT, 40 MSPS, 2x/4x INTERPOLATING CommsDAC DIGITAL-TO-ANALOG CONVERTER
DAC5674IPHPG4 TI

完全替代

14-BIT, 40 MSPS, 2x/4x INTERPOLATING CommsDAC DIGITAL-TO-ANALOG CONVERTER
DAC5674IPHP TI

完全替代

14-BIT, 40 MSPS, 2x/4x INTERPOLATING CommsDAC DIGITAL-TO-ANALOG CONVERTER

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