Datasheet > 微控制器和处理器 > 串行 IO/通信控制器> CY7C53120E2-10SXI

CY7C53120E2-10SXI

更新时间： 2024-11-25 02:51:43

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		微控制器和处理器串行IO控制器通信控制器外围集成电路光电二极管局域网时钟
页数	文件大小	规格书
14页	380K
描述
Neuron㈢ Chip Network Processor

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技术参数
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CY7C53120E2-10SXI 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOP, SOP32,.55	针数：	32
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.31.00.01	Factory Lead Time：	1 week
风险等级：	2.22	Is Samacsys：	N
地址总线宽度：	16	边界扫描：	NO
最大时钟频率：	10 MHz	数据编码/解码方法：	DIFF BIPHASE-LEVEL
外部数据总线宽度：	8	JESD-30 代码：	S-PDSO-G32
JESD-609代码：	e4	长度：	20.4465 mm
低功率模式：	NO	湿度敏感等级：	3
串行 I/O 数：	5	端子数量：	32
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP32,.55	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
电源：	5 V	认证状态：	Not Qualified
座面最大高度：	2.997 mm	子类别：	Serial IO/Communication Controllers
最大压摆率：	20 mA	最大供电电压：	5.5 V
最小供电电压：	4.5 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	11.303 mm	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：	1

CY7C53120E2-10SXI 数据手册

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CY7C53150

CY7C53120

Neuron^®Chip Network Processor

Features

• Three 8-bit pipelined processors for concurrent processing

of application code and network traffic

• 10 KB (CY7C53120E2), 12 KB (CY7C53120E4) of ROM

containing LonTalk^®network protocol firmware

• 11-pin IO port programmable in 34 modes for fast appli-

cation program development

• Maximum input clock operation of 20 MHz (CY7C53150),

10 MHz (CY7C53120E2), 40 MHz (CY7C53120E4) over a

–40°C to 85°C^[2]temperature range

• Two 16-bit timer/counters for measuring and generating IO

device waveforms

• 64-pin TQFP package (CY7C53150)

• 5-pin communication port that supports direct connect and

network transceiver interfaces

• 32-pin SOIC or 44-pin TQFP package (CY7C53120)

Functional Description

• Programmable pull ups on IO4–IO7 and 20 mA sink current

on IO0–IO3

The CY7C531x0 Neuron^®chip implements a node for

LonWorks^®distributed intelligent control networks. It incorpo-

rates, on a single chip, the necessary communication and

control functions, both in hardware and firmware, that facilitate

the design of a LonWorks node.

• Unique48-bitIDnumberineverydevicetofacilitatenetwork

installation and management

• Low operating current; sleep mode operation for reduced

current consumption^[1]

• 0.35 μm Flash process technology

• 5.0V operation

The CY7C531x0 contains a very flexible 5-pin communication

port that can be configured to interface with a wide variety of

media transceivers at a wide range of data rates. The most

common transceiver types are twisted-pair, powerline, RF, IR,

fiber-optics, and coaxial.

• On-chip LVD circuit to prevent nonvolatile memory

corruption during voltage drops

• 2,048 bytes of SRAM for buffering network data, system,

and application data storage

The CY7C531x0 is manufactured using state of the art

0.35-μm Flash technology, providing to designers the most

cost-effective Neuron chip solution.

• 512 bytes (CY7C53150), 2048 bytes (CY7C53120E2),

4096 bytes (CY7C53120E4) of Flash memory with on-chip

charge pump for flexible storage of configuration data and

application code

Services at every layer of the OSI networking reference model

are implemented in the LonTalk firmware based protocol

stored in 10-KB ROM (CY7C53120E2), 12-KB ROM

(CY7C53120E4), or off-chip memory (CY7C53150). The

• Addresses up to 58 KB of external memory (CY7C53150)

Logic Block Diagram

CP4

CP0

Media Access

Control Processor

Communications

Port

IO10

IO0

Network

Internal

IO Block

Processor

Data Bus

(0:7)

Application

Processor

2 Timer/

Counters

Internal

Address Bus

(0:15)

2 KB RAM

CLK1

Oscillator,

Clock, and

Control

CLK2

SERVICE

RESET

Flash

External

Address/Data Bus

(CY7C53150)

ROM

(CY7C53120)

Notes

1. Rare combinations of wake-up events occurring during the go to sleep sequence could produce unexpected sleep behavior. For details, refer to Cypress’s Neuron

Metastability Description application note.

2. Maximum Junction Temperature is 105°C. T

= T

+ V•I•θ_JA. 32-pin SOIC θ_JA= 51C/W. 44-pin TQFP θ_JA= 43C/W. 64-pin TQFP θ_JA= 44C/W.

Junction

Ambient

Cypress Semiconductor Corporation

Document #: 38-10001 Rev. *E

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised March 14, 2007

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CY7C53120E2-10SXI 替代型号

型号	品牌	替代类型	描述	数据表
CY7C53120E4-40SXIT	CYPRESS	类似代替	Neuron㈢ Chip Network Processor
CY7C53120E4-40SXI	CYPRESS	类似代替	Neuron㈢ Chip Network Processor
CY7C53120E2-10AXI	CYPRESS	类似代替	Neuron㈢ Chip Network Processor

与CY7C53120E2-10SXI相关器件

型号	品牌	获取价格	描述	数据表
CY7C53120E2-10SXIT	CYPRESS	获取价格	LAN Controller, 5 Channel(s), CMOS, PDSO32, 0.450 INCH, SOIC-32
CY7C53120E4-40AI	CYPRESS	获取价格	Neuron?? Chip Network Processor
CY7C53120E4-40AIT	CYPRESS	获取价格	LAN Controller, 5 Channel(s), CMOS, PQFP44, 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-64
CY7C53120E4-40AXI	CYPRESS	获取价格	Neuron㈢ Chip Network Processor
CY7C53120E4-40AXI	INFINEON	获取价格	Control Communications
CY7C53120E4-40SI	CYPRESS	获取价格	Neuron?? Chip Network Processor
CY7C53120E4-40SIT	CYPRESS	获取价格	LAN Controller, 5 Channel(s), CMOS, PDSO32, 0.450 INCH, SOIC-32
CY7C53120E4-40SXI	CYPRESS	获取价格	Neuron㈢ Chip Network Processor
CY7C53120E4-40SXI	INFINEON	获取价格	Control Communications
CY7C53120E4-40SXIT	CYPRESS	获取价格	Neuron㈢ Chip Network Processor

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