Datasheet > CY7C53120E4-40SXI

CY7C53120E4-40SXI

更新时间： 2024-11-26 14:56:11

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
19页	539K
描述
Control Communications

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中文翻译

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数据手册

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CY7C53150, CY7C53120

Neuron Chip Network Processor

Features

■ Three 8-bit pipelined processors for concurrent processing of

application code and network traffic

■ On-chip LVD circuit to prevent nonvolatile memory corruption

during voltage drops

■ 11-pin I/O port programmable in 34 modes for fast application

program development

■ 2,048 bytes of SRAM for buffering network data, system, and

application data storage

■ Two 16-bit timer/counters for measuring and generating I/O

device waveforms

■ 512 bytes (CY7C53150), 2048 bytes (CY7C53120E2), 4096

bytes (CY7C53120E4) of Flash memory with on-chip charge

pump for flexible storage of configuration data and application

code

■ 5-pin communication port that supports direct connect and

network transceiver interfaces

■ Addresses up to 58 KB of external memory (CY7C53150)

■ Programmable pull-ups on I/O4–I/O7 and 20 mA sink current

on I/O0–I/O3

■ 10 KB (CY7C53120E2), 12 KB (CY7C53120E4) of ROM

containing LonTalk network protocol firmware

■ Unique 48-bit ID number in every device to facilitate network

installation and management

■ Maximum input clock operation of 20 MHz (CY7C53150),

10 MHz (CY7C53120E2), 40 MHz (CY7C53120E4) over a

–40°C to 85°C^[2]temperature range

■ Low operating current; sleep mode operation for reduced

current consumption^[1]

■ 64-pin TQFP package (CY7C53150)

■ 0.35 m flash process technology

■ 5.0 V operation

■ 32-pin SOIC or 44-pin TQFP package (CY7C53120)

Logic Block Diagram

CP4

CP0

Media Access

Control Processor

Communications

Port

I/O10

I/O0

Network

Processor

Internal

Data Bus

(0:7)

I/O Block

Application

Processor

2 Timer/

Counters

Internal

Address Bus

(0:15)

2 KB RAM

Flash

CLK1

Oscillator,

Clock, and

Control

CLK2

SERVICE

RESET

External

Address/Data Bus

(CY7C53150)

ROM

(CY7C53120)

Notes

1. Rare combinations of wake-up events occurring during the go to sleep sequence could produce unexpected sleep behavior.

2. Maximum Junction Temperature is 105 °C. T = T

+ V•I•_JA. 32-pin SOIC _JA= 51 °C/W. 44-pin TQFP _JA= 43 °C/W. 64-pin TQFP _JA= 44 °C/W.

Junction

Ambient

Cypress Semiconductor Corporation

Document Number: 38-10001 Rev. *L

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised May 16, 2017

12 3 4 5 6 7...19

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与CY7C53120E4-40SXI相关器件

型号	品牌	获取价格	描述	数据表
CY7C53120E4-40SXIT	CYPRESS	获取价格	Neuron㈢ Chip Network Processor
CY7C53120E4-40SXIT	INFINEON	获取价格	Control Communications
CY7C53120L8	CYPRESS	获取价格	3.3V Neuron Chip Network Processor
CY7C53120L8-32SI	CYPRESS	获取价格	3.3V Neuron Chip Network Processor
CY7C53120L8-44AI	CYPRESS	获取价格	3.3V Neuron Chip Network Processor
CY7C53150	CYPRESS	获取价格	Neuron?? Chip Network Processor
CY7C53150_07	CYPRESS	获取价格	Neuron㈢ Chip Network Processor
CY7C53150-20AI	CYPRESS	获取价格	Neuron?? Chip Network Processor
CY7C53150-20AIT	CYPRESS	获取价格	LAN Controller, 5 Channel(s), CMOS, PQFP64, 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-64
CY7C53150-20AXI	CYPRESS	获取价格	Neuron㈢ Chip Network Processor

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