Datasheet > CY7C1019B_06

CY7C1019B_06

更新时间： 2024-11-07 05:09:31

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
8页	328K
描述
128K x 8 Static RAM

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数据手册

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CY7C1019B_06 数据手册

CY7C1019B

128K x 8 Static RAM

expansion is provided by an active LOW Chip Enable (CE), an

active LOW Output Enable (OE), and tri-state drivers. This

device has an automatic power-down feature that significantly

reduces power consumption when deselected.

Features

• High speed

— t_AA= 12 ns

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O

pins (I/O₀through I/O₇) is then written into the location

specified on the address pins (A₀through A₁₆).

• CMOS for optimum speed/power

• Center power/ground pinout

• Automatic power-down when deselected

• Easy memory expansion with CE and OE options

• Functionally equivalent to CY7C1019

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing Write

Enable (WE) HIGH. Under these conditions, the contents of

the memory location specified by the address pins will appear

on the I/O pins.

• AvailableinPb-freeandnonPb-free32-pinTSOPII, non

Pb-free 400-mil-wide SOJ packages.

The eight input/output pins (I/O₀through I/O₇) are placed in a

high-impedance state when the device is deselected (CE

HIGH), the outputs are disabled (OE HIGH), or during a write

operation (CE LOW, and WE LOW).

Functional Description

The CY7C1019B is a high-performance CMOS static RAM

organized as 131,072 words by 8 bits. Easy memory

Logic Block Diagram

Pin Configurations

/TSOPII

SOJ

Top View

I/O₀

INPUT BUFFER

I/O

I/O₁

I/O₂

I/O

I/O₃

I/O₄

I/O₅

I/O₆

128K x 8

ARRAY

I/O

POWER

DOWN

COLUMN

DECODER

I/O₇

Selection Guide

-12

-15

Unit

Maximum Access Time

Maximum Operating Current

Maximum Standby Current

140

130

Cypress Semiconductor Corporation

Document #: 38-05026 Rev. *C

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised August 3, 2006

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