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CY7C1019BN PDF预览

CY7C1019BN

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
8页 413K
描述
128K x 8 Static RAM

CY7C1019BN 数据手册

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CY7C1019BN  
128K x 8 Static RAM  
Features  
Functional Description  
• High speed  
The CY7C1019BN is a high-performance CMOS static RAM  
organized as 131,072 words by 8 bits. Easy memory  
expansion is provided by an active LOW Chip Enable (CE), an  
active LOW Output Enable (OE), and three-state drivers. This  
device has an automatic power-down feature that significantly  
reduces power consumption when deselected.  
— tAA = 12, 15 ns  
• CMOS for optimum speed/power  
• Center power/ground pinout  
• Automatic power-down when deselected  
• Easy memory expansion with CE and OE options  
• Functionally equivalent to CY7C1019  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O  
pins (I/O0 through I/O7) is then written into the location  
specified on the address pins (A0 through A16).  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing Write  
Enable (WE) HIGH. Under these conditions, the contents of  
the memory location specified by the address pins will appear  
on the I/O pins.  
The eight input/output pins (I/O0 through I/O7) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), or during a write  
operation (CE LOW, and WE LOW).  
The CY7C1019BN is available in standard 32-pin TSOP Type  
II and 400-mil-wide SOJ packages.  
Logic Block Diagram  
Pin Configurations  
/ TSOPII  
SOJ  
Top View  
A
A
1
A
A
32  
1
0
16  
31  
30  
2
3
4
5
6
15  
A
A
14  
A
13  
2
A
29  
28  
3
I/O0  
INPUT BUFFER  
CE  
OE  
I/O  
I/O  
27  
26  
I/O  
I/O1  
I/O2  
0
1
7
A
0
I/O  
V
7
8
9
10  
11  
12  
13  
6
A
1
25  
24  
23  
22  
21  
A
2
V
CC  
SS  
A
V
3
V
CC  
I/O  
SS  
A
I/O3  
I/O4  
I/O5  
I/O6  
4
512 x 256 x 8  
ARRAY  
I/O  
I/O  
2
3
5
4
A
5
A
I/O  
A
6
A
7
WE  
A
4
12  
A
8
A
11  
20  
19  
A
5
A
10  
14  
15  
16  
A
6
A
9
A
8
18  
17  
POWER  
DOWN  
COLUMN  
DECODER  
A
7
CE  
I/O7  
WE  
OE  
Cypress Semiconductor Corporation  
Document #: 001-06425 Rev. **  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised February 1, 2006  

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