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CY7C1019B-12ZXC PDF预览

CY7C1019B-12ZXC

更新时间: 2024-11-24 05:09:31
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
8页 328K
描述
128K x 8 Static RAM

CY7C1019B-12ZXC 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:LEAD FREE, TSOP2-32
针数:32Reach Compliance Code:unknown
ECCN代码:3A991.B.2.BHTS代码:8542.32.00.41
风险等级:5.3最长访问时间:12 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G32
JESD-609代码:e3长度:20.95 mm
内存密度:1048576 bit内存集成电路类型:STANDARD SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP32,.46
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.0003 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.14 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:10.16 mmBase Number Matches:1

CY7C1019B-12ZXC 数据手册

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CY7C1019B  
128K x 8 Static RAM  
expansion is provided by an active LOW Chip Enable (CE), an  
active LOW Output Enable (OE), and tri-state drivers. This  
device has an automatic power-down feature that significantly  
reduces power consumption when deselected.  
Features  
• High speed  
— tAA = 12 ns  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O  
pins (I/O0 through I/O7) is then written into the location  
specified on the address pins (A0 through A16).  
• CMOS for optimum speed/power  
• Center power/ground pinout  
• Automatic power-down when deselected  
• Easy memory expansion with CE and OE options  
• Functionally equivalent to CY7C1019  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing Write  
Enable (WE) HIGH. Under these conditions, the contents of  
the memory location specified by the address pins will appear  
on the I/O pins.  
• AvailableinPb-freeandnonPb-free32-pinTSOPII, non  
Pb-free 400-mil-wide SOJ packages.  
The eight input/output pins (I/O0 through I/O7) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), or during a write  
operation (CE LOW, and WE LOW).  
Functional Description  
The CY7C1019B is a high-performance CMOS static RAM  
organized as 131,072 words by 8 bits. Easy memory  
Logic Block Diagram  
Pin Configurations  
/TSOPII  
SOJ  
Top View  
A
A
1
A
A
32  
1
0
16  
31  
30  
2
3
4
5
6
15  
A
A
14  
A
13  
2
A
29  
28  
3
I/O0  
INPUT BUFFER  
CE  
OE  
I/O  
I/O  
27  
26  
I/O  
I/O1  
I/O2  
0
1
7
A
0
I/O  
V
7
8
9
10  
11  
12  
13  
6
A
1
25  
24  
23  
22  
21  
A
2
V
CC  
SS  
A
V
3
V
CC  
I/O  
SS  
A
I/O3  
I/O4  
I/O5  
I/O6  
4
128K x 8  
ARRAY  
I/O  
I/O  
2
3
5
4
A
5
A
I/O  
A
6
A
7
WE  
A
4
12  
A
8
A
11  
20  
19  
A
5
A
10  
14  
15  
16  
A
6
A
9
A
8
18  
17  
POWER  
DOWN  
COLUMN  
DECODER  
A
7
CE  
I/O7  
WE  
OE  
Selection Guide  
-12  
12  
-15  
15  
Unit  
ns  
Maximum Access Time  
Maximum Operating Current  
Maximum Standby Current  
140  
10  
130  
10  
mA  
mA  
Cypress Semiconductor Corporation  
Document #: 38-05026 Rev. *C  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised August 3, 2006  
[+] Feedback  

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