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CY7C0851AV-167BBC

更新时间： 2024-11-07 04:10:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
31页 830K
描述
FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM

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CY7C0851AV-167BBC 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：BGA
包装说明：15 X 15 MM, 1.25 MM HEIGHT, 1 MM PITCH, FBGA-172针数：172
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41Factory Lead Time：1 week
风险等级：5.61最长访问时间：4 ns
其他特性：PIPELINED ARCHITECTURE最大时钟频率 (fCLK)：167 MHz
I/O 类型：COMMONJESD-30 代码：S-PBGA-B172
JESD-609代码：e0长度：15 mm
内存密度：2359296 bit内存集成电路类型：DUAL-PORT SRAM
内存宽度：36湿度敏感等级：3
功能数量：1端口数量：2
端子数量：172字数：65536 words
字数代码：64000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：64KX36输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：LBGA
封装等效代码：BGA172,14X14,40封装形状：SQUARE
封装形式：GRID ARRAY, LOW PROFILE并行/串行：PARALLEL
峰值回流温度（摄氏度）：240电源：3.3 V
认证状态：Not Qualified座面最大高度：1.25 mm
最大待机电流：0.075 A最小待机电流：3.14 V
子类别：SRAMs最大压摆率：0.3 mA
最大供电电压 (Vsup)：3.465 V最小供电电压 (Vsup)：3.135 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30宽度：15 mm
Base Number Matches：1

CY7C0851AV-167BBC 数据手册

 浏览型号CY7C0851AV-167BBC的Datasheet PDF文件第2页浏览型号CY7C0851AV-167BBC的Datasheet PDF文件第3页浏览型号CY7C0851AV-167BBC的Datasheet PDF文件第4页浏览型号CY7C0851AV-167BBC的Datasheet PDF文件第5页浏览型号CY7C0851AV-167BBC的Datasheet PDF文件第6页浏览型号CY7C0851AV-167BBC的Datasheet PDF文件第7页 
CY7C093794V CY7C093894V CY7C09289V CY7C09369V CY7C09379V CY7C09389V3.3V 64K/128K  
Synchronous Dual-Port RAM  
x 36 and 128K/256K x 18  
CY7C0850AV/CY7C0851AV  
CY7C0852AV/CY7C0853AV  
TM  
FLEx36 3.3V 32K/64K/128K/256K x 36  
Synchronous Dual-Port RAM  
Functional Description  
Features  
• True dual-ported memory cells that allow simultaneous  
The FLEx36™ family includes 1M, 2M, 4M and 9M pipelined,  
synchronous, true dual-port static RAMs that are high-speed,  
low-power 3.3V CMOS. Two ports are provided, permitting  
independent, simultaneous access to any location in memory.  
The result of writing to the same location by more than one port  
at the same time is undefined. Registers on control, address,  
and data lines allow for minimal set-up and hold time.  
During a Read operation, data is registered for decreased  
cycle time. Each port contains a burst counter on the input  
address register. After externally loading the counter with the  
initial address, the counter will increment the address inter-  
nally (more details to follow). The internal Write pulse width is  
independent of the duration of the R/W input signal. The  
internal Write pulse is self-timed to allow the shortest possible  
cycle times.  
A HIGH on CE0 or LOW on CE1 for one clock cycle will power  
down the internal circuitry to reduce the static power  
consumption. One cycle with chip enables asserted is required  
to reactivate the outputs.  
Additional features include: readback of burst-counter internal  
address value on address lines, counter-mask registers to  
control the counter wrap-around, counter interrupt (CNTINT)  
flags, readback of mask register value on address lines,  
retransmit functionality, interrupt flags for message passing,  
JTAG for boundary scan, and asynchronous Master Reset  
(MRST).  
access of the same memory location  
• Synchronous pipelined operation  
• Organization of 1-Mbit, 2-Mbit, 4-Mbit and 9-Mbit  
devices  
• Pipelined output mode allows fast operation  
• 0.18-micron CMOS for optimum speed and power  
• High-speed clock to data access  
• 3.3V low power  
— Active as low as 225 mA (typ)  
— Standby as low as 55 mA (typ)  
• Mailbox function for message passing  
• Global master reset  
• Separate byte enables on both ports  
• Commercial and industrial temperature ranges  
• IEEE 1149.1-compatible JTAG boundary scan  
• 172-ball FBGA (1 mm pitch) (15 mm × 15 mm)  
• 176-pin TQFP (24 mm × 24 mm × 1.4 mm)  
• Counter wrap around control  
— Internal mask register controls counter wrap-around  
— Counter-interrupt flags to indicate wrap-around  
— Memory block retransmit operation  
• Counter readback on address lines  
• Mask register readback on address lines  
The CY7C0853A device in this family has limited features.  
Please see See “Address Counter and Mask Register  
Operations[10]” on page 8. for details.  
• Dual Chip Enables on both ports for easy depth  
expansion  
Table 1. Product Selection Guide  
1-Mbit  
2-Mbit  
4-Mbit  
9-Mbit  
Density  
(32K x 36)  
CY7C0850AV  
167  
(64K x 36)  
(128K x 36)  
(256K x 36)  
Part Number  
Max. Speed (MHz)  
CY7C0851AV  
CY7C0852AV  
CY7C0853AV  
167  
4.0  
225  
167  
4.0  
225  
133  
4.7  
270  
Max. Access Time - Clock to Data (ns)  
Typical operating current (mA)  
Package  
4.0  
225  
176TQFP  
176TQFP  
176TQFP  
172FBGA  
172FBGA  
172FBGA  
172FBGA  
Cypress Semiconductor Corporation  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Document #: 38-06070 Rev. *G  
Revised August 15, 2005  
1234567...31

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CY7C0851AV-167BBC 替代型号

型号 品牌 替代类型 描述 数据表
CY7C0851AV-167BBXC CYPRESS

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 FLEx36™ 3.3 V 32 K / 64 K / 128 K / 256 K Ã
CY7C0851AV-133BBI CYPRESS

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 FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C0851V-167BBC CYPRESS

功能相似

 FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM

与CY7C0851AV-167BBC相关器件

型号 品牌 获取价格 描述 数据表
CY7C0851AV-167BBXC CYPRESS

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 		FLEx36™ 3.3 V 32 K / 64 K / 128 K / 256 K Ã
CY7C0851V CYPRESS

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 		FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C0851V-100AC CYPRESS

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 		Dual-Port SRAM, 64KX36, 5ns, CMOS, PQFP176, 24 X 24 MM, 1.40 MM HEIGHT, TQFP-176
CY7C0851V-133AC CYPRESS

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 		FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C0851V-133ACT CYPRESS

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 		暂无描述
CY7C0851V-133AI CYPRESS

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 		FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C0851V-133BBC CYPRESS

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 		FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C0851V-133BBI CYPRESS

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 		FLEx36TM 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
CY7C0851V-150AC CYPRESS

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 		Dual-Port SRAM, 64KX36, 4ns, CMOS, PQFP176, 24 X 24 MM, 1.40 MM HEIGHT, TQFP-176
CY7C0851V-150BBC ROCHESTER

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 		64KX36 DUAL-PORT SRAM, 4ns, PBGA172, 15 X 15 MM, 1 MM PITCH, BGA-172

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