5秒后页面跳转
CY7C026A-15AXI PDF预览

CY7C026A-15AXI

更新时间: 2024-09-18 12:50:27
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
21页 318K
描述
16K x 16 Dual-Port Static RAM

CY7C026A-15AXI 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFP包装说明:LEAD FREE, PLASTIC, MS-026, TQFP-100
针数:100Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.31最长访问时间:15 ns
I/O 类型:COMMONJESD-30 代码:S-PQFP-G100
JESD-609代码:e3长度:14 mm
内存密度:262144 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端口数量:2
端子数量:100字数:16384 words
字数代码:16000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:16KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP100,.63SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:1.6 mm
最大待机电流:0.0015 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.305 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:14 mm
Base Number Matches:1

CY7C026A-15AXI 数据手册

 浏览型号CY7C026A-15AXI的Datasheet PDF文件第2页浏览型号CY7C026A-15AXI的Datasheet PDF文件第3页浏览型号CY7C026A-15AXI的Datasheet PDF文件第4页浏览型号CY7C026A-15AXI的Datasheet PDF文件第5页浏览型号CY7C026A-15AXI的Datasheet PDF文件第6页浏览型号CY7C026A-15AXI的Datasheet PDF文件第7页 
CY7C026A16K  
x 16 Dual-Port Static RAM  
CY7C026A  
16K x 16 Dual-Port Static RAM  
Expandable data bus to 32 bits or more using Master/Slave  
chip select when using more than one device  
Features  
True dual-ported memory cells that allow simultaneous access  
of the same memory location  
On-chip arbitration logic  
Semaphores included to permit software handshaking  
between ports  
16K x 16 organization (CY7C026A)  
0.35 micron CMOS for optimum speed and power  
High speed access: 15, and 20 ns  
Low operating power  
INT flags for port-to-port communication  
Separate upper-byte and lower-byte control  
Pin select for Master or Slave  
Active: ICC = 180 mA (typical)  
Standby: ISB3 = 0.05 mA (typical)  
Fully asynchronous operation  
Automatic power-down  
Commercial and Industrial temperature ranges  
Available in 100-pin thin quad plastic flatpack (TQFP)  
Pb-free packages available  
Logic Block Diagram  
R/WL  
UBL  
R/WR  
UBR  
CEL  
CER  
LBL  
LBR  
OEL  
OER  
8
8
[1]  
[1]  
I/O8L–I/O15L  
I/O8L–I/O15R  
8
8
I/O  
I/O  
Control  
[2]  
[2]  
I/O0L–I/O7L  
Control  
I/O0L–I/O7R  
14  
14  
Address  
Decode  
Address  
Decode  
True Dual-Ported  
A0L–A13L  
A0R–A13R  
RAM Array  
14  
14  
A0L–A13L  
CEL  
A0R–A13R  
CER  
Interrupt  
Semaphore  
Arbitration  
OEL  
OER  
R/WL  
SEML  
R/WR  
SEMR  
[3]  
[3]  
BUSYL  
BUSYR  
INTR  
UBR  
INTL  
UBL  
LBL  
M/S  
LBR  
Notes  
1. I/O –I/O for x16 devices.  
8
15  
2. I/O –I/O for x16 devices.  
0
7
3. BUSY is an output in master mode and an input in slave mode.  
Cypress Semiconductor Corporation  
Document #: 38-06046 Rev. *G  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised October 14, 2011  

与CY7C026A-15AXI相关器件

型号 品牌 获取价格 描述 数据表
CY7C026A-20AC CYPRESS

获取价格

16K x 16/18 Dual-Port Static RAM
CY7C026A-20ACT CYPRESS

获取价格

Dual-Port SRAM, 16KX16, 20ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100
CY7C026A-20AXC CYPRESS

获取价格

16K x 16/18 Dual-Port Static RAM
CY7C026A-20AXCT CYPRESS

获取价格

Multi-Port SRAM, 16KX16, 20ns, CMOS, PQFP100, LEAD FREE, PLASTIC, MS-026, TQFP-100
CY7C026AV CYPRESS

获取价格

3.3V 4K/8K/16K x 16/18 Dual-Port Static RAM
CY7C026AV-20AC CYPRESS

获取价格

3.3V 4K/8K/16K x 16/18 Dual-Port Static RAM
CY7C026AV-20AC ROCHESTER

获取价格

16KX16 DUAL-PORT SRAM, 20ns, PQFP100, PLASTIC, TQFP-100
CY7C026AV-20AXC CYPRESS

获取价格

3.3V 4K/8K/16K x 16/18 Dual-Port Static RAM
CY7C026AV-20AXI ROCHESTER

获取价格

16KX16 DUAL-PORT SRAM, 20ns, PQFP100, LEAD FREE, PLASTIC, TQFP-100
CY7C026AV-20AXI CYPRESS

获取价格

3.3V 4K/8K/16K x 16/18 Dual-Port Static RAM