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CY62137FV18LL-55BVXIT PDF预览

CY62137FV18LL-55BVXIT

更新时间： 2024-11-24 19:53:55
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
11页 381K
描述
Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48

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CY62137FV18LL-55BVXIT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active包装说明：VFBGA, BGA48,6X8,30
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.56
最长访问时间：55 nsI/O 类型：COMMON
JESD-30 代码：R-PBGA-B48JESD-609代码：e1
长度：8 mm内存密度：2097152 bit
内存集成电路类型：STANDARD SRAM内存宽度：16
湿度敏感等级：3功能数量：1
端子数量：48字数：131072 words
字数代码：128000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：128KX16输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装等效代码：BGA48,6X8,30封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH并行/串行：PARALLEL
峰值回流温度（摄氏度）：260电源：1.8/2 V
认证状态：Not Qualified座面最大高度：1 mm
最大待机电流：0.000004 A最小待机电流：1 V
子类别：SRAMs最大压摆率：0.018 mA
最大供电电压 (Vsup)：2.25 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：0.75 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30宽度：6 mm
Base Number Matches：1

CY62137FV18LL-55BVXIT 数据手册

 浏览型号CY62137FV18LL-55BVXIT的Datasheet PDF文件第2页浏览型号CY62137FV18LL-55BVXIT的Datasheet PDF文件第3页浏览型号CY62137FV18LL-55BVXIT的Datasheet PDF文件第4页浏览型号CY62137FV18LL-55BVXIT的Datasheet PDF文件第5页浏览型号CY62137FV18LL-55BVXIT的Datasheet PDF文件第6页浏览型号CY62137FV18LL-55BVXIT的Datasheet PDF文件第7页 
CY62137FV18 MoBL®  
2-Mbit (128K x 16) Static RAM  
consumption when addresses are not toggling. Placing the  
device into standby mode reduces power consumption by more  
than 99% when deselected (CE HIGH or both BLE and BHE are  
HIGH). The input and output pins (IO0 through IO15) are placed  
in a high impedance state when:  
Features  
■ Very high speed: 55 ns  
■ Wide voltage range: 1.65V–2.25V  
■ Pin compatible with CY62137CV18  
■ Deselected (CE HIGH)  
■ Ultra low standby power  
❐ Typical standby current: 1 µA  
❐ Maximum standby current: 5 µA  
■ Outputs are disabled (OE HIGH)  
■ Both the Byte High Enable and the Byte Low Enable are  
disabled (BHE, BLE HIGH)  
■ Ultra low active power  
❐ Typical active current: 1.6 mA @ f = 1 MHz  
■ Write operation is active (CE LOW and WE LOW)  
To write to the device, take Chip Enable (CE) and Write Enable  
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data  
from IO pins (IO0 through IO7) is written into the location  
specified on the address pins (A0 through A16). If Byte High  
■ Ultra low standby power  
■ Easy memory expansion with CE and OE features  
■ Automatic power down when deselected  
■ CMOS for optimum speed and power  
■ Byte power down feature  
Enable (BHE) is LOW, then data from IO pins (IO8 through IO15  
)
is written into the location specified on the address pins (A0  
through A16).  
■ Available in a Pb-free 48-Ball VFBGA package  
To read from the device, take Chip Enable (CE) and Output  
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If  
Byte Low Enable (BLE) is LOW, then data from the memory  
location specified by the address pins appear on IO0 to IO7. If  
Byte High Enable (BHE) is LOW, then data from the memory  
appears on IO8 to IO15. See the “Truth Table” on page 9 for a  
complete description of read and write modes.  
Functional Description  
The CY62137FV18 is a high performance CMOS static RAM  
organized as 128K words by 16 bits. This device features  
advanced circuit design to provide ultra low active current. This  
is ideal for providing More Battery Life™ (MoBL®) in portable  
applications such as cellular telephones. The device also has an  
automatic power down feature that significantly reduces power  
For best practice recommendations, refer to the Cypress  
application note AN1064, SRAM System Guidelines.  
Logic Block Diagram  
DATA IN DRIVERS  
A10  
A9  
A8  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
128K x 16  
RAM Array  
IO0–IO7  
IO8–IO15  
COLUMN DECODER  
BHE  
WE  
CE  
OE  
BLE  
CE  
POWER DOWN  
CIRCUIT  
BHE  
BLE  
Cypress Semiconductor Corporation  
Document #: 001-08030 Rev. *E  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised August 01, 2007  
1234567...11

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CY62137FV18LL-55BVXIT 替代型号

型号 品牌 替代类型 描述 数据表
CY62137FV18LL-55BVXI CYPRESS

完全替代

 2-Mbit (128K x 16) Static RAM

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CY62137FV30LL-45BVIT CYPRESS

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