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CY28342ZC

更新时间: 2024-11-17 23:13:39
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟
页数 文件大小 规格书
22页 180K
描述
High-performance SiS645/650 Pentium 4 Clock Synthesizer

CY28342ZC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:6 X 12 MM, TSSOP2-48
针数:48Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.8JESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:12.5 mm
端子数量:48最高工作温度:70 °C
最低工作温度:最大输出时钟频率:166.6 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP48,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V主时钟/晶体标称频率:14.318 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Clock Generators最大压摆率:280 mA
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

CY28342ZC 数据手册

 浏览型号CY28342ZC的Datasheet PDF文件第2页浏览型号CY28342ZC的Datasheet PDF文件第3页浏览型号CY28342ZC的Datasheet PDF文件第4页浏览型号CY28342ZC的Datasheet PDF文件第5页浏览型号CY28342ZC的Datasheet PDF文件第6页浏览型号CY28342ZC的Datasheet PDF文件第7页 
42  
CY28342  
High-performance SiS645/650 Pentium 4 Clock Synthesizer  
Features  
• Supports Pentium 4-type CPUs  
• 3.3V power supply  
• Eight copies of PCI clocks  
• One 4-MHz USB clock  
• Two copies of ZCLK clocks  
• One 48-MHz/24-MHz programmable SIO clock  
• Two differential CPU clock pairs  
• SMBus support with read-back capabilities  
• Spread Spectrum EMI reduction  
• Dial-a-Frequency® features  
Dial-a-Ratiofeatures  
Dial-a-dB® features  
48-pin SSOP and TSSOP packages  
Watchdog Function  
Pin Configuration[1]  
Block Diagram  
XIN  
XOUT  
REF(0:2)  
1
2
3
4
5
6
7
8
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VDDSD  
SDCLK  
VSSSD  
CPU_STP#*  
CPU1T  
CPU1C  
VDDC  
VSSC  
CPU0T  
CPU0C  
IREF  
VSSA  
VDDA  
SCLK  
SDATA  
PD#/VTTPWRGD*  
VSSAGP  
AGP0  
VDDR  
**FS0/REF0  
**FS1/REF1  
**FS2/REF2  
VSSR  
CPU(0:1)T  
CPU(0:1)C  
PLL1  
XIN  
XOUT  
VSSZ  
ZCLK0  
ZCLK1  
CPU_STP#  
IREF  
SDCLK  
9
AGP(0:1)  
Power  
on  
FS(0:4)  
10  
11  
12  
13  
14  
15  
VDDZ  
*SRESET#/PCI_STP#  
ZCLK(0:1)  
MULT0  
Latch  
VDDP  
**FS3/PCI_F0  
**FS4/PCI_F1  
VTTPWRGD  
/2  
PCI(0:5)  
PCI_STP#  
PLL2  
PCI0 16  
PCI_F(0:1)  
48M  
PCI1  
17  
VSSP  
VDDP  
PCI2  
PCI3  
PCI4  
PCI5  
VSSP  
18  
19  
20  
21  
22  
23  
24  
AGP1  
48M_24M#  
VDDAGP  
VDD48M  
48M  
24_48M/MULT0*  
VSS48M  
WD  
Logic  
PD#  
SRESET#  
I2C  
Logic  
SDATA  
SCLK  
48 Pin SSOP andf TSSOP  
Note:  
1. Pins marked with [*] have internal pull-up resistors. Pins marked with [**] have internal pull-down resistors.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-07349 Rev. *A  
Revised July 29, 2002  

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