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CY2219PVC-1T

更新时间： 2024-11-09 20:03:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
9页 139K
描述
Processor Specific Clock Generator, 66.67MHz, CMOS, PDSO48, SSOP-48

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中文翻译

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CY2219PVC-1T 技术参数

生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP,针数：48
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.84
其他特性：ALSO REQUIRES 2.5V SUPPLYJESD-30 代码：R-PDSO-G48
长度：15.875 mm端子数量：48
最高工作温度：70 °C最低工作温度：
最大输出时钟频率：66.67 MHz封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH主时钟/晶体标称频率：14.318 MHz
认证状态：Not Qualified座面最大高度：2.794 mm
最大供电电压：3.465 V最小供电电压：3.135 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL宽度：7.5057 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches：1

CY2219PVC-1T 数据手册

 浏览型号CY2219PVC-1T的Datasheet PDF文件第2页浏览型号CY2219PVC-1T的Datasheet PDF文件第3页浏览型号CY2219PVC-1T的Datasheet PDF文件第4页浏览型号CY2219PVC-1T的Datasheet PDF文件第5页浏览型号CY2219PVC-1T的Datasheet PDF文件第6页浏览型号CY2219PVC-1T的Datasheet PDF文件第7页 
9
CY2219  
Spread Spectrum Frequency Timing Generator  
for Integrated CPU  
Features  
Benefits  
• Mixed 2.5V and 3.3V operation  
Supports Intel® Timna processors with integrated graphics  
and memory controllers  
• Multiple output clocks at different frequencies  
— Three CPU clocks at 66 MHz  
Single-chip main motherboard clock generator  
—Support for CPU and chipset  
—Eight PCI clocks at 33 MHz, 1 free-running  
—One DRCG reference clock at 50 or 66 MHz  
—Two synchronous APIC clocks at 16.67 MHz  
—One 3.3V clock selectable between 66 or 48 MHz  
—One 3.3V and one 2.5V clock at 48 MHz  
—Two reference clocks at 14.318 MHz  
—Support for multiple PCI slots and chipset  
—Drives one main memory clock generator, including  
DRCG (134S)  
—Supports USB frequencies and I/O chip  
• Spread Spectrum clocking  
Enables reduction of EMI  
—31 kHz modulation frequency  
—EPROM programmable percentage of spreading.  
Default is –0.6%, which is recommended by Intel®  
• Two Frequency Select inputs  
• Low skew and low jitter outputs  
• OE and Test Mode support  
• 48-pin SSOP package  
Supports up to four CPU clock frequencies  
Meet-tight system timing requirements at high frequency  
Enables ATE and “bed of nails” testing  
Widely available, standard package enables lower cost  
Logic Block Diagram  
SSOP  
Top View  
PIN27EN  
CPU2EN  
V
V
SSREF  
DDAPIC  
1
2
3
4
48  
47  
46  
45  
44  
43  
42  
41  
APICCLK0  
APICCLK1  
REFCLK0/CPU2EN  
REFCLK1/PIN27EN  
REFCLK [0–1]  
V
(14.31818 MHz)  
V
DDREF  
SSAPIC  
V
XTALIN  
5
6
DDDRCG  
XTALOUT  
V
DRCGREF  
V
CPUCLK [0–2] (66.67 MHz)  
DRCGREF (50/66.67 MHz)  
SSPCI  
PCICLKF  
PCICLK1  
7
SSDRCG  
CPUSTOP  
V
8
DDCPU  
40  
39  
38  
37  
36  
35  
9
CPUCLK0  
CPUCLK1  
V
DDPCI  
10  
11  
XTALIN  
14.318  
MHz  
OSC.  
Divider,  
EPROM-Prog  
Delay,  
Stop,  
&Other  
CPU  
PLL  
PCICLK2  
PCICLK3  
CPUCLK2  
XTALOUT  
V
12  
13  
SSCPU  
PCICLKF (33.33 MHz)  
TEST  
V
SSPCI  
SEL1  
SEL0  
SPREAD  
AV  
DD  
14  
15  
16  
17  
18  
Logic  
PCICLK4  
PCICLK5  
EPROM  
PCICLK [1–7] (33.33 MHz)  
APICCLK [0–1] (16.67 MHz)  
34  
33  
AV  
SS  
V
CPUSTOP  
DDPCI  
SEL66/48  
V
32  
31  
30  
29  
28  
27  
26  
25  
PCICLK6  
PCICLK7  
DD2V48  
2V48CLK  
PCISTOP  
TEST  
PWRDWN  
V
V
3V66/48CLK1 (66.67/48 MHz)  
3V48CLK0 (48 MHz)  
19  
20  
21  
22  
23  
24  
SSPCI  
SS2V48  
PCISTOP  
SEL66/48  
PWRDWN  
SPREAD  
SEL0  
V
DD3V48  
SYS  
PLL  
3V66/48CLK1  
3V48CLK0  
2V48CLK (48 MHz)  
SEL1  
V
SS3V48  
Intel and Pentium are registered trademarks of Intel Corporation.  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
October 3, 2000, Rev. *A  
1234567...9

中文翻译

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