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CY22381FSZCT PDF预览

CY22381FSZCT

更新时间: 2024-11-29 13:07:11
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟发生器闪存
页数 文件大小 规格书
11页 332K
描述
Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, SOIC-8

CY22381FSZCT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.76
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.889 mm湿度敏感等级:1
端子数量:8最高工作温度:70 °C
最低工作温度:最大输出时钟频率:200 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260主时钟/晶体标称频率:166 MHz
认证状态:Not Qualified座面最大高度:1.7272 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.8985 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

CY22381FSZCT 数据手册

 浏览型号CY22381FSZCT的Datasheet PDF文件第2页浏览型号CY22381FSZCT的Datasheet PDF文件第3页浏览型号CY22381FSZCT的Datasheet PDF文件第4页浏览型号CY22381FSZCT的Datasheet PDF文件第5页浏览型号CY22381FSZCT的Datasheet PDF文件第6页浏览型号CY22381FSZCT的Datasheet PDF文件第7页 
CY22381  
CY223811  
Three-PLL General Purpose FLASH  
Programmable Clock Generator  
8-pin SOIC package (CY22381)  
Features  
8-pin SOIC package with NiPdAu lead finish (CY223811)  
CyClocks RT™ support  
Three integrated phase-locked loops  
Ultra-wide divide counters (eight-bit Q, eleven-bit P, and  
seven-bit post divide)  
Functional Description  
Improved linear crystal load capacitors  
Flash programmability  
The CY22381 is the next-generation programmable Flash  
programmableclockforuseinnetworking, telecommunication,  
datacom, and other general-purpose applications. The  
CY22381 offers up to three configurable outputs in a 8-pin  
SOIC, running off a 3.3V power supply. The on-chip reference  
oscillator is designed to run off an 8–30-MHz crystal, or a  
1–166-MHz external clock signal. The CY22381 has a three  
PLLs driving 3 programmable output clocks. The output clocks  
are derived from the PLL or the reference frequency (REF).  
Output post dividers are available for either. The CY223811 is  
the CY22381 with NiPdAu lead finish.  
Field programmability  
Low-jitter, high-accuracy outputs  
Power-management options (Shutdown, OE, Suspend)  
Configurable crystal drive strength  
Frequency select option through external LVTTL Input  
3.3V operation  
Logic Block Diagram  
XTALIN  
OSC.  
XTALOUT  
PLL1  
Divider  
CLKC  
7-BIT  
11-BIT P  
8-BIT Q  
CONFIGURATION  
FLASH  
4 × 3  
Crosspoint  
Switch  
PLL2  
Divider  
7-BIT  
11-BIT P  
8-BIT Q  
CLKB  
CLKA  
SHUTDOWN/OE  
FS/SUSPEND  
PLL3  
Divider  
7-BIT  
11-BIT P  
8-BIT Q  
Cypress Semiconductor Corporation  
Document #: 38-07012 Rev. *H  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised January 17, 2011  
[+] Feedback  

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