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CY22381

更新时间: 2024-11-28 22:35:23
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟发生器闪存
页数 文件大小 规格书
8页 145K
描述
Three-PLL General Purpose FLASH Programmable Clock Generator

CY22381 数据手册

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CY22381  
Three-PLL General Purpose FLASH  
Programmable Clock Generator  
• Non-volatile programming enables easy customi-  
zation, ultra-fast turnaround, performance tweaking,  
design timing margin testing, inventory control, lower  
part count, and more secure product supply. Can also  
Features  
• Three integrated phase-locked loops  
• Ultra-widedividecounters(eight-bitQ,eleven-bitP,and  
be programmed multiple times which reduces  
programming errors and provides an easy upgrade  
path for existing designs  
seven-bit post divide)  
• Improved linear crystal load capacitors  
• Flash programmability  
• In-house programming of samples and prototype  
quantities is available using the CY3672 FTG devel-  
opmentKit.Productionquantitiesareavailablethrough  
Cypress’s value-added distribution partners or by  
using third party programmers from BP Microsystems,  
HiLo Systems, and others.  
• Performance suitable for high-endmultimedia, commu-  
nications, industrial, A/D converters, and consumer  
applications  
• Field programmability  
• Low-jitter, high-accuracy outputs  
• Power-management options (Shutdown, OE, Suspend)  
• Configurable crystal drive strength  
• Frequency select option via external LVTTL Input  
• 3.3V operation  
• Eight-pin SOIC package  
• CyClocks RT™ support  
• Supports numerous low-power application schemes  
and reduces EMI by allowing unused outputs to be  
turned off  
• Adjust crystal drive strength for compatibility with  
Benefits  
virtually all crystals  
• External frequency select option for PLL1, CLKA, and  
CLKB  
• Industry standard supply voltage  
• Industry standard packaging saves on board space  
• Easy-to-use software support for design entry  
• Generates up to three unique frequencies on three  
outputs up to 200 MHz from an external source.  
Functional upgrade for current CY2081 family.  
• Allows for 0 ppm frequency generation and frequency  
conversion under the most demanding applications  
• Improves frequency accuracy over temperature, age,  
process, and initial offset  
Logic Block Diagram  
XTALIN  
OSC.  
XTALOUT  
PLL1  
Divider  
CLKC  
7-BIT  
11-BIT P  
CONFIGURATION  
FLASH  
8-BIT Q  
4 × 3  
PLL2  
11-BIT P  
8-BIT Q  
Crosspoint  
Switch  
Divider  
7-BIT  
CLKB  
CLKA  
SHUTDOWN/OE  
FS/SUSPEND  
PLL3  
11-BIT P  
8-BIT Q  
Divider  
7-BIT  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Document #: 38-07012 Rev. *D  
Revised October 13, 2004  

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