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CY14B256K-SP45IT PDF预览

CY14B256K-SP45IT

更新时间: 2024-11-05 20:06:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
21页 588K
描述
Non-Volatile SRAM, 32KX8, 45ns, CMOS, PDSO48, ROHS COMPLIANT, SSOP-48

CY14B256K-SP45IT 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP,Reach Compliance Code:compliant
风险等级:5.71最长访问时间:45 ns
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
内存密度:262144 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:48
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN (800)端子形式:GULL WING
端子位置:DUAL处于峰值回流温度下的最长时间:20
Base Number Matches:1

CY14B256K-SP45IT 数据手册

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ADVANCE  
INFORMATION  
CY14B256K  
256-Kbit (32K x 8) nvSRAM with Real-Time  
Clock  
• 10 mA Typical ICC at 200-ns Cycle Time  
Features  
• Single 3V Operation 20%, -10%  
• Data Integrity of Cypress nvSRAM Combined with  
Full-Featured Real-Time Clock  
• SSOP Package (ROHS compliant)  
— Low Power, 300 nA Max, RTC current  
— Capacitor or battery backup for RTC  
• Watchdog Timer  
Functional Description  
The Cypress CY14B256K combines a 256-Kbit nonvolatile  
static RAM with a full-featured real-time clock in a monolithic  
integrated circuit. The embedded nonvolatile elements incor-  
porate QuantumTrap technology producing the world’s most  
reliable nonvolatile memory. The SRAM can be read and  
written an unlimited number of times, while independent,  
nonvolatile data resides in the nonvolatile elements.  
• Clock Alarm with programmable Interrupts  
• 25 ns, 35 ns, and 45 ns Access Times  
• “Hands-off” Automatic STORE on Power-down with  
only a small capacitor  
STORE to QuantumTrapInitiated by Software, device  
pin, or on Power-down  
The Real-Time Clock function provides an accurate clock with  
leap year tracking and a programmable, high accuracy oscil-  
lator. The Alarm function is programmable for one-time alarms  
or periodic seconds, minutes, hours, or days. There is also a  
programmable Watchdog Timer for process control.  
RECALL to SRAM Initiated by Software or on Power-up  
• Unlimited READ, WRITE and RECALL Cycles  
• High-reliability  
— Endurance to 500K Cycles  
— Data Retention: 100 years  
Logic Block Diagram  
OE  
CE  
WE  
Cypress Semiconductor Corporation  
Document #: 001-06431 Rev. *A  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised February 22, 2006  

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