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CDCE62002

更新时间： 2024-11-18 06:47:07

品牌	Logo	应用领域
德州仪器 - TI		时钟发生器
页数	文件大小	规格书
49页	1488K
描述
Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

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CDCE62002 数据手册

CDCE62002

www.ti.com.............................................................................................................................................................. SCAS882A–JUNE 2009–REVISED JULY 2009

Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

FEATURES

•

Flexible Inputs With Innovative Smart

Multiplexer Feature:

•

Frequency Synthesizer With PLL/VCO and

Partially Integrated Loop Filter

–

Two Universal Differential Inputs Accept

Frequencies from 1 MHz up to 500 MHz

(LVPECL), 500 MHz (LVDS), or 250 MHz

(LVCMOS).

Fully Configurable Outputs Including

Frequency and Output Format

Smart Input Multiplexer Automatically

Switches Between one of two Reference

Inputs.

–

One Auxiliary Input Accepts Single Ended

Clock Source or Crystal. Auxiliary Input

Accepts Crystals in the Range of

2MHz–42MHz or an LVCMOS Input up to

75MHz.

•

Multiple Operational Modes Include Clock

Generation via Crystal, SERDES Startup Mode,

Jitter Cleaning, and Oscillator Based Holdover

Mode.

–

Clock Generator Mode Using Crystal Input

Smart Input Multiplexer can be Configured

to Automatically Switch Between Highest

Priority Clock Source Available Allowing

for Fail-Safe Operation.

•

Integrated EEPROM Determines Device

Configuration at Power-up.

•

Excellent Jitter Performance

Integrated Frequency Synthesizer Including

PLL, Multiple VCOs, and Loop Filter:

•

Typical Power Consumption 750mW at 3.3V

Integrated EEPROM Stores Default Settings;

Therefore, the Device can Power up in a

Known, Predefined State.

–

Full Programmability Facilitates Phase

Noise Performance Optimization Enabling

Jitter Cleaner Mode

•

Offered in QFN-32 Package

–

Programmable Charge Pump Gain and

Loop Filter Settings

ESD Protection Exceeds 2kV HBM

Industrial Temperature Range –40°C to 85°C

Unique Dual-VCO Architecture Supports a

Wide Tuning Range 1.750 GHz – 2.356 GHz.

APPLICATIONS

•

Universal Output Blocks Support up to 2

Differential, 4 Single-Ended, or Combinations

of Differential or Single-Ended:

•

Data Converter and Data Aggregation Clocking

Wireless Infrastructure

Switches and Routers

Medical Electronics

Military and Aerospace

Industrial

Clock Generation and Jitter Cleaning

–

0.5 ps RMS (10 kHz to 20 MHz) Output

Jitter Performance

Low Output Phase Noise: –130 dBc/Hz

at 1 MHz offset, Fc = 491.52 MHz

Output Frequency Ranges From 10.94

MHz to 1.175 GHz in Synthesizer Mode

–

LVPECL, LVDS and LVCMOS

Independent Output Dividers Support

Divide Ratios for

1,2,3,4,5,8,10,12,16,20,24 and 32.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...49

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与CDCE62002相关器件

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CDCE62002RHBR	TI	获取价格	Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
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CDCE6214LTWRGERQ1	TI	获取价格	支持 PCIe® 第 1 代至第 5 代、具有低电平有效输出使能端的超低功耗时钟发生器 \|
CDCE6214LTWRGETQ1	TI	获取价格	支持 PCIe® 第 1 代至第 5 代、具有低电平有效输出使能端的超低功耗时钟发生器 \|
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